Cleanup ice_rod.asm
This commit is contained in:
scawful
@@ -1,10 +1,8 @@
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;===========================================================
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; Ice Rod freezes water
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; Written by Conn
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;
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;===========================================================
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IceRodTileRam = $03EF
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; Ancilla_CheckTileCollision_Targeted_continue
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@@ -12,87 +10,88 @@ org $088A5D
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JSL $0EFBA0
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org $0EFBA0 ; main code
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LinkItem_IceRod:
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LinkItem_IceRod:
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{
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; load native value
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STA $03E4, X : TAY
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; check if you're on overworld
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; check if you're on overworld
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LDA $008C : BNE $01
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RTL
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RTL
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; disable other flying object icing water (boomerang, sword beam)
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LDA $03A3 : CMP #$06 : BEQ $01
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RTL
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; check if ice shot #1 only is used (disable 2nd shot to ice)
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CPX #$04 : BEQ $01
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RTL
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; disable other flying object icing water (boomerang, sword beam)
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LDA $03A3 : CMP #$06 : BEQ $01
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RTL
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; check if ice shot is on water tiles
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; check if ice shot #1 only is used (disable 2nd shot to ice)
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CPX #$04 : BEQ $01
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RTL
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; check if ice shot is on water tiles
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LDA $03E8 : CMP #$08 : BEQ .on_water_tiles
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; check if ice shot is on native unused, edited blocks
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LDA $03E8 : CMP #$03 : BEQ $01
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RTL
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.on_water_tiles
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; check if ice shot is on native unused, edited blocks
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LDA $03E8 : CMP #$03 : BEQ $01
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RTL
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.on_water_tiles
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; double check if really ice shot is used
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LDA $0303 : CMP #$06 : BEQ $01
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RTL
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LDA $0303 : CMP #$06 : BEQ $01
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RTL
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LDA $0304 : CMP #$06 : BEQ $01
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RTL
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TXA
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LDA $0304 : CMP #$06 : BEQ $01
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RTL
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TXA
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STA $7ED004 ; store native x value into ram to regain after code
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; wait for vblank to enable dma transfer
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LDA $4212 : AND #$80 : BEQ $F9
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LDA $4212 : AND #$80 : BEQ $F9
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REP #$30
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LDA $2116 : STA $7ED005 ; store native value to regain later
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REP #$30
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LDA $2116 : STA $7ED005 ; store native value to regain later
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; calculation procedure to get correct x,y coordinates for new tile
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LDA $00 : SEC : SBC $0708 : AND $070A
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ASL A
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ASL A
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ASL A
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STA $06
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LDA $02 : SEC : SBC $070C : AND $070E : ORA $06
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TAX
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LDA $00 : SEC : SBC $0708 : AND $070A
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ASL A
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ASL A
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ASL A
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STA $06
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LDA $02 : SEC : SBC $070C : AND $070E : ORA $06
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TAX
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LDA #$00B7 : STA $7E2000, X ; store new 16x16 ice tile into ram (property of tile!)
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CLC : STZ $02 ; calculation procedure to get 8x8 vram map address (look of tile)
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TXA
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AND #$003F : CMP #$0020 : BCC $05
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LDA #$0400 : STA $02
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TXA
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AND #$0FFF : CMP #$0800 : BCC $07
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LDA $02 : ADC #$07FF : STA $02
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TXA
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AND #$001F : ADC $02 : STA $02
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TXA
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AND #$0780
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LSR A
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ADC $02
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TXA
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AND #$003F : CMP #$0020 : BCC $05
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LDA #$0400 : STA $02
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TXA
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AND #$0FFF : CMP #$0800 : BCC $07
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LDA $02 : ADC #$07FF : STA $02
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TXA
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AND #$001F : ADC $02 : STA $02
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TXA
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AND #$0780
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LSR A
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ADC $02
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STA $2116 ; store vram address for upper tile part (8x16) to $2116
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STA $7ED007
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; Palette set here
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LDA #$1D83 ; load new ice tiles
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STA $7ED000
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STA $7ED002
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JSR $FD00 ; jsr to dma vram transfer for upper ice tile part
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REP #$30
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REP #$30
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LDA $7ED007 ; regain vram address
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ADC #$0020 ; add 20 for lower part (8x16) and store to $2116
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STA $2116
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STA $2116
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JSR $FD00 ; jsr to dma vram transfer for lower ice tile part
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LDA $7ED005 ; regain native register value
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STA $2116
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SEP #$30
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SEP #$30
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LDA $7ED004 ; regain native x-value
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TAX
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RTL
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TAX
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RTL
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}
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@@ -100,52 +99,51 @@ org $0EFD00 ; vram dma transfer
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VramDmaTransfer:
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{
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LDA #$007E ; load origin of bytes to transfer (7E/d000)
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STA $4304
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LDA #$D000
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STA $4302
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SEP #$30
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STA $4304
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LDA #$D000
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STA $4302
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SEP #$30
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LDA #$18 ; bus
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STA $4301
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LDA #$04 ; transfer 4 bytes
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STA $4305
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LDA #$01
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STA $4300
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STA $4301
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LDA #$04 ; transfer 4 bytes
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STA $4305
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LDA #$01
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STA $4300
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STA $420B ; make dma transfer
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RTS
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RTS
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}
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; bug fix to not swim through tiles but jump onto them
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org $07DC9E
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JSL $0EFC80
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nop
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NOP
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org $0EFC80
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LDA $0A
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TSB $0343
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TSB $0348
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RTL
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LDA $0A
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TSB $0343
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TSB $0348
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RTL
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; bug fix to stop gliding on shallow water when leaving ice tile
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org $07DD1B
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; bug fix to stop gliding on shallow water when leaving ice tile
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org $07DD1B
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JSL $0EFC90
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RTS
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org $0EFC90
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LDA $0A
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TSB $0359
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LDA $0350
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CMP #$0100
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BNE $03
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STZ $034A
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RTL
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LDA $0A
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TSB $0359
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LDA $0350
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CMP #$0100
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BNE $03
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STZ $034A
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RTL
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org $0E95DC ; get a 0e written here (first byte) to enable gliding on new tiles
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ASL $5757
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org $0F85B8 ; get new tile values (83 1d) written 4 times here
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STA $1D,s
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STA $1D,s
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STA $1D,s
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STA $1D,s
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STA $1D, S
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STA $1D, S
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STA $1D, S
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STA $1D, S
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