SNES, CPU, Emulator + tests updated
This commit is contained in:
scawful
@@ -32,10 +32,6 @@ void CPU::Update(UpdateMode mode, int stepCount) {
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}
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void CPU::ExecuteInstruction(uint8_t opcode) {
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// Update the PC based on the Program Bank Register
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PC |= (static_cast<uint16_t>(PB) << 16);
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// uint8_t operand = -1;
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bool immediate = false;
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uint16_t operand = 0;
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bool accumulator_mode = GetAccumulatorSize();
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@@ -181,7 +177,7 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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ASL(operand);
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break;
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case 0x16: // ASL DP Indexed, X
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operand = DirectPageIndexedX();
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operand = ReadByBitMode((0x00 << 16) + DirectPageIndexedX());
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ASL(operand);
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break;
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case 0x1E: // ASL Absolute Indexed, X
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@@ -195,25 +191,30 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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break;
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case 0xB0: // BCS Branch if carry set
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BCS(memory.ReadByte(PC));
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operand = memory.ReadByte(PC);
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BCS(operand);
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break;
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case 0xF0: // BEQ Branch if equal (zero set)
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operand = memory.ReadByte(PC);
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operand = memory.ReadByte((PB << 16) + PC + 1);
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BEQ(operand);
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break;
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case 0x24: // BIT Direct Page
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BIT(DirectPage());
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operand = DirectPage();
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BIT(operand);
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break;
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case 0x2C: // BIT Absolute
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BIT(Absolute());
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operand = Absolute();
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BIT(operand);
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break;
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case 0x34: // BIT DP Indexed, X
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BIT(DirectPageIndexedX());
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operand = DirectPageIndexedX();
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BIT(operand);
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break;
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case 0x3C: // BIT Absolute Indexed, X
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BIT(AbsoluteIndexedX());
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operand = AbsoluteIndexedX();
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BIT(operand);
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break;
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case 0x89: // BIT Immediate
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operand = Immediate();
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@@ -222,22 +223,22 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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break;
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case 0x30: // BMI Branch if minus (negative set)
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operand = memory.ReadByte(PC);
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operand = memory.ReadByte((PB << 16) + PC + 1);
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BMI(operand);
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break;
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case 0xD0: // BNE Branch if not equal (zero clear)
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operand = memory.ReadByte(PC);
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operand = memory.ReadByte((PB << 16) + PC + 1);
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BNE(operand);
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break;
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case 0x10: // BPL Branch if plus (negative clear)
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operand = memory.ReadByte(PC);
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operand = memory.ReadByte((PB << 16) + PC + 1);
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BPL(operand);
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break;
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case 0x80: // BRA Branch always
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operand = memory.ReadByte(PC);
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operand = memory.ReadByte((PB << 16) + PC + 1);
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BRA(operand);
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break;
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@@ -247,16 +248,16 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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case 0x82: // BRL Branch always long
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operand = FetchSignedWord();
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PC += operand;
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next_pc_ = operand;
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break;
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case 0x50: // BVC Branch if overflow clear
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operand = memory.ReadByte(PC);
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operand = FetchByte();
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BVC(operand);
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break;
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case 0x70: // BVS Branch if overflow set
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operand = memory.ReadByte(PC);
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operand = FetchByte();
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BVS(operand);
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break;
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@@ -505,7 +506,8 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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break;
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case 0x20: // JSR Absolute
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JSR(Absolute());
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operand = Absolute();
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JSR(operand);
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break;
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case 0x22: // JSL Absolute Long
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@@ -526,7 +528,7 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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break;
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case 0xA5: // LDA Direct Page
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operand = DirectPage();
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LDA(operand);
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LDA(operand, false, true);
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break;
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case 0xA7: // LDA DP Indirect Long
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operand = DirectPageIndirectLong();
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@@ -1102,6 +1104,8 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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}
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LogInstructions(PC, opcode, operand, immediate, accumulator_mode);
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uint8_t instructionLength = GetInstructionLength(opcode);
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UpdatePC(instructionLength);
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}
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void CPU::LogInstructions(uint16_t PC, uint8_t opcode, uint16_t operand,
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@@ -1109,7 +1113,7 @@ void CPU::LogInstructions(uint16_t PC, uint8_t opcode, uint16_t operand,
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if (flags()->kLogInstructions) {
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std::ostringstream oss;
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oss << "$" << std::uppercase << std::setw(2) << std::setfill('0')
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<< static_cast<int>(DB) << ":" << std::hex << PC << ": 0x" << std::hex
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<< static_cast<int>(PB) << ":" << std::hex << PC << ": 0x" << std::hex
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<< static_cast<int>(opcode) << " " << opcode_to_mnemonic.at(opcode)
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<< " ";
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@@ -1138,7 +1142,7 @@ void CPU::LogInstructions(uint16_t PC, uint8_t opcode, uint16_t operand,
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} else {
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// Log the address and opcode.
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std::cout << "$" << std::uppercase << std::setw(2) << std::setfill('0')
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<< static_cast<int>(DB) << ":" << std::hex << PC << ": 0x"
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<< static_cast<int>(PB) << ":" << std::hex << PC << ": 0x"
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<< std::hex << static_cast<int>(opcode) << " "
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<< opcode_to_mnemonic.at(opcode) << " ";
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@@ -1231,7 +1235,7 @@ void CPU::ANDAbsoluteLong(uint32_t address) {
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uint32_t operand32 = memory.ReadWordLong(address);
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A &= operand32;
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x80000000);
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SetNegativeFlag(A & 0x8000);
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}
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// ASL: Arithmetic shift left
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@@ -1248,21 +1252,21 @@ void CPU::ASL(uint16_t address) {
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// BCC: Branch if carry clear
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void CPU::BCC(int8_t offset) {
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if (!GetCarryFlag()) { // If the carry flag is clear
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PC += offset; // Add the offset to the program counter
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next_pc_ = offset;
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}
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}
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// BCS: Branch if carry set
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void CPU::BCS(int8_t offset) {
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if (GetCarryFlag()) { // If the carry flag is set
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PC += offset; // Add the offset to the program counter
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next_pc_ = offset;
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}
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}
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// BEQ: Branch if equal (zero set)
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void CPU::BEQ(int8_t offset) {
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if (GetZeroFlag()) { // If the zero flag is set
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PC += offset; // Add the offset to the program counter
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next_pc_ = offset;
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}
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}
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@@ -1277,26 +1281,27 @@ void CPU::BIT(uint16_t address) {
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// BMI: Branch if minus (negative set)
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void CPU::BMI(int8_t offset) {
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if (GetNegativeFlag()) { // If the negative flag is set
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PC += offset; // Add the offset to the program counter
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next_pc_ = offset;
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}
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}
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// BNE: Branch if not equal (zero clear)
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void CPU::BNE(int8_t offset) {
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if (!GetZeroFlag()) { // If the zero flag is clear
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PC += offset; // Add the offset to the program counter
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// PC += offset;
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next_pc_ = offset;
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}
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}
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// BPL: Branch if plus (negative clear)
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void CPU::BPL(int8_t offset) {
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if (!GetNegativeFlag()) { // If the negative flag is clear
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PC += offset; // Add the offset to the program counter
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next_pc_ = offset;
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}
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}
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// BRA: Branch always
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void CPU::BRA(int8_t offset) { PC += offset; }
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void CPU::BRA(int8_t offset) { next_pc_ = offset; }
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// BRK: Break
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void CPU::BRK() {
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@@ -1312,21 +1317,19 @@ void CPU::BRK() {
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}
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// BRL: Branch always long
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void CPU::BRL(int16_t offset) {
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PC += offset; // Add the offset to the program counter
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}
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void CPU::BRL(int16_t offset) { next_pc_ = offset; }
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// BVC: Branch if overflow clear
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void CPU::BVC(int8_t offset) {
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if (!GetOverflowFlag()) { // If the overflow flag is clear
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PC += offset; // Add the offset to the program counter
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next_pc_ = offset;
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}
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}
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// BVS: Branch if overflow set
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void CPU::BVS(int8_t offset) {
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if (GetOverflowFlag()) { // If the overflow flag is set
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PC += offset; // Add the offset to the program counter
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next_pc_ = offset;
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}
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}
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@@ -1497,40 +1500,41 @@ void CPU::INY() {
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// JMP: Jump
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void CPU::JMP(uint16_t address) {
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PC = address; // Set program counter to the new address
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next_pc_ = address; // Set program counter to the new address
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}
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// JML: Jump long
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void CPU::JML(uint32_t address) {
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// Set the lower 16 bits of PC to the lower 16 bits of the address
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PC = static_cast<uint8_t>(address & 0xFFFF);
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next_pc_ = static_cast<uint16_t>(address & 0xFFFF);
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// Set the PBR to the upper 8 bits of the address
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PB = static_cast<uint8_t>((address >> 16) & 0xFF);
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}
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// JSR: Jump to subroutine
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void CPU::JSR(uint16_t address) {
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PC -= 1; // Subtract 1 from program counter
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memory.PushWord(PC); // Push the program counter onto the stack
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PC = address; // Set program counter to the new address
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next_pc_ = address; // Set program counter to the new address
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}
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// JSL: Jump to subroutine long
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void CPU::JSL(uint32_t address) {
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PC -= 1; // Subtract 1 from program counter
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memory.PushLong(PC); // Push the program counter onto the stack as a long
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// value (24 bits)
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PC = address; // Set program counter to the new address
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next_pc_ = address; // Set program counter to the new address
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}
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// LDA: Load accumulator
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void CPU::LDA(uint16_t address, bool isImmediate) {
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void CPU::LDA(uint16_t address, bool isImmediate, bool direct_page) {
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uint8_t bank = PB;
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if (direct_page) {
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bank = 0;
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}
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if (GetAccumulatorSize()) {
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A = isImmediate ? address : memory.ReadByte(address);
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A = isImmediate ? address : memory.ReadByte((bank << 16) | address);
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x80);
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} else {
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A = isImmediate ? address : memory.ReadWord(address);
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A = isImmediate ? address : memory.ReadWord((bank << 16) | address);
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x8000);
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}
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@@ -1728,7 +1732,7 @@ void CPU::RTL() {
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}
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// RTS: Return from subroutine
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void CPU::RTS() { PC = memory.PopWord() + 1; } // ASL: Arithmetic shift left
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void CPU::RTS() { last_call_frame_ = memory.PopWord(); }
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void CPU::SBC(uint16_t value, bool isImmediate) {
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uint16_t operand;
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@@ -1937,6 +1941,250 @@ void CPU::XCE() {
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E = carry;
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}
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uint8_t CPU::GetInstructionLength(uint8_t opcode) {
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switch (opcode) {
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case 0x00: // BRK
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return 0;
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case 0x60: // RTS
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PC = last_call_frame_;
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return 3;
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// TODO: Handle JMPs in logging.
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case 0x20: // JSR Absolute
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case 0x4C: // JMP Absolute
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case 0x6C: // JMP Absolute Indirect
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case 0x5C: // JMP Absolute Indexed Indirect
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case 0x22: // JSL Absolute Long
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PC = next_pc_;
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return 0;
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// Branch Instructions (BCC, BCS, BNE, BEQ, etc.)
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case 0x90: // BCC near
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if (!GetCarryFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0xB0: // BCS near
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if (GetCarryFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0x30: // BMI near
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if (GetNegativeFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0xF0: // BEQ near
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if (GetZeroFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0xD0: // BNE Relative
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if (!GetZeroFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0x10: // BPL Relative
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if (!GetNegativeFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0x50: // BVC Relative
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if (!GetOverflowFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0x70: // BVS Relative
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if (GetOverflowFlag()) {
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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case 0x80: // BRA Relative
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PC += next_pc_;
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return 0;
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case 0x82: // BRL Relative Long
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PC += next_pc_;
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return 0;
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// Single Byte Instructions
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case 0x18: // CLC
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case 0xD8: // CLD
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case 0x58: // CLI
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case 0xB8: // CLV
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case 0xCA: // DEX
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case 0x88: // DEY
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case 0xE8: // INX
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case 0xC8: // INY
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case 0xEA: // NOP
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case 0x48: // PHA
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case 0x0B: // PHD
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case 0x4B: // PHK
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case 0x08: // PHP
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case 0xDA: // PHX
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case 0x5A: // PHY
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case 0x68: // PLA
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case 0xAB: // PLB
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case 0x2B: // PLD
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case 0x28: // PLP
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case 0xFA: // PLX
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case 0x7A: // PLY
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case 0xC2: // REP
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case 0x40: // RTI
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case 0x38: // SEC
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case 0xF8: // SED
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case 0xE2: // SEP
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case 0x78: // SEI
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case 0xAA: // TAX
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case 0xA8: // TAY
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case 0xBA: // TSX
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case 0x8A: // TXA
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case 0x9A: // TXS
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case 0x98: // TYA
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case 0x0A: // ASL Accumulator
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return 1;
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// Two Byte Instructions
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case 0x69: // ADC Immediate
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case 0x29: // AND Immediate
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case 0xC9: // CMP Immediate
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case 0xE0: // CPX Immediate
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case 0xC0: // CPY Immediate
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case 0x49: // EOR Immediate
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case 0xA9: // LDA Immediate
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case 0xA2: // LDX Immediate
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case 0xA0: // LDY Immediate
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case 0x09: // ORA Immediate
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case 0xE9: // SBC Immediate
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case 0x65: // ADC Direct Page
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case 0x72: // ADC Direct Page Indirect
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case 0x67: // ADC Direct Page Indirect Long
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case 0x75: // ADC Direct Page Indexed, X
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case 0x61: // ADC Direct Page Indirect, X
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case 0x71: // ADC DP Indirect Indexed, Y
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case 0x77: // ADC DP Indirect Long Indexed, Y
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case 0x63: // ADC Stack Relative
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case 0x73: // ADC SR Indirect Indexed, Y
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return GetAccumulatorSize() ? 2 : 3;
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case 0x7D: // ADC Absolute Indexed, X
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case 0x79: // ADC Absolute Indexed, Y
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case 0x6D: // ADC Absolute
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return 3;
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case 0x7F: // ADC Absolute Long Indexed, X
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case 0x6F: // ADC Absolute Long
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return 4;
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case 0xA5: // LDA Direct Page
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case 0x05: // ORA Direct Page
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case 0x85: // STA Direct Page
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case 0xC6: // DEC Direct Page
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case 0x97: // STA Direct Page Indexed Y
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case 0x25: // AND Direct Page
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case 0x32: // AND Direct Page Indirect Indexed Y
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case 0x27: // AND Direct Page Indirect Long
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case 0x35: // AND Direct Page Indexed X
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case 0x21: // AND Direct Page Indirect Indexed Y
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case 0x31: // AND Direct Page Indirect Long Indexed Y
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case 0x37: // AND Direct Page Indirect Long Indexed Y
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case 0x23: // AND Direct Page Indirect Indexed X
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case 0x33: // AND Direct Page Indirect Long Indexed Y
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case 0xE6: // INC Direct Page
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return 2;
|
||||
|
||||
// ASL (Arithmetic Shift Left)
|
||||
case 0x06: // ASL Direct Page
|
||||
case 0x16: // ASL Direct Page Indexed, X
|
||||
return 2;
|
||||
|
||||
case 0x0E: // ASL Absolute
|
||||
case 0x1E: // ASL Absolute Indexed, X
|
||||
return 3;
|
||||
|
||||
// Three Byte Instructions
|
||||
case 0x2D: // AND Absolute
|
||||
case 0xCD: // CMP Absolute
|
||||
case 0xEC: // CPX Absolute
|
||||
case 0xCC: // CPY Absolute
|
||||
case 0x4D: // EOR Absolute
|
||||
case 0xAD: // LDA Absolute
|
||||
case 0xAE: // LDX Absolute
|
||||
case 0xAC: // LDY Absolute
|
||||
case 0x0D: // ORA Absolute
|
||||
case 0xED: // SBC Absolute
|
||||
case 0x8D: // STA Absolute
|
||||
case 0x8E: // STX Absolute
|
||||
case 0x8C: // STY Absolute
|
||||
case 0xBD: // LDA Absolute Indexed X
|
||||
case 0xBC: // LDY Absolute Indexed X
|
||||
case 0x3D: // AND Absolute Indexed X
|
||||
case 0x39: // AND Absolute Indexed Y
|
||||
return 3;
|
||||
|
||||
// Four Byte Instructions
|
||||
case 0x2F: // AND Absolute Long
|
||||
case 0xCF: // CMP Absolute Long
|
||||
case 0x4F: // EOR Absolute Long
|
||||
case 0xAF: // LDA Absolute Long
|
||||
case 0x0F: // ORA Absolute Long
|
||||
case 0xEF: // SBC Absolute Long
|
||||
case 0x8F: // STA Absolute Long
|
||||
case 0x3F: // AND Absolute Long Indexed X
|
||||
return 4;
|
||||
|
||||
// BIT (Bit Test)
|
||||
// Include all BIT variants similar to ADC
|
||||
|
||||
// BRK (Break) and COP (Co-Processor Enable)
|
||||
|
||||
case 0x02: // COP param
|
||||
return 2;
|
||||
|
||||
// CMP (Compare Accumulator)
|
||||
// Include all CMP variants similar to ADC
|
||||
|
||||
// CPX (Compare X Register) and CPY (Compare Y Register)
|
||||
// Include CPX and CPY variants
|
||||
|
||||
// DEC (Decrement Memory)
|
||||
// Include DEC variants similar to ASL
|
||||
|
||||
// EOR (Exclusive OR with Accumulator)
|
||||
// Include all EOR variants similar to ADC
|
||||
|
||||
// Variable length or Special cases
|
||||
// Add cases for instructions with variable lengths or special handling
|
||||
default:
|
||||
auto mnemonic = opcode_to_mnemonic.at(opcode);
|
||||
std::cerr << "Unknown instruction length: " << std::hex
|
||||
<< static_cast<int>(opcode) << ", " << mnemonic << std::endl;
|
||||
return 1; // Default to 1 as a safe fallback
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace emu
|
||||
} // namespace app
|
||||
} // namespace yaze
|
||||
Reference in New Issue
Block a user