From 5755e2e867b938e801c1b2ee66acf1c839ca8647 Mon Sep 17 00:00:00 2001 From: scawful Date: Tue, 5 Dec 2023 03:46:40 -0500 Subject: [PATCH] Update Cpu class logging --- src/app/emu/cpu.cc | 41 +++++++++++++++++++++++++---------------- src/app/emu/cpu.h | 8 ++++---- 2 files changed, 29 insertions(+), 20 deletions(-) diff --git a/src/app/emu/cpu.cc b/src/app/emu/cpu.cc index 521667ce..8c1c5d03 100644 --- a/src/app/emu/cpu.cc +++ b/src/app/emu/cpu.cc @@ -410,7 +410,9 @@ void CPU::ExecuteInstruction(uint8_t opcode) { << (int)DB << std::endl; std::cout << "E: " << std::hex << std::setw(2) << std::setfill('0') << (int)E << std::endl; - + // status registers + std::cout << "C: " << std::hex << std::setw(2) << std::setfill('0') + << (int)status << std::endl; break; } @@ -559,7 +561,7 @@ void CPU::ExecuteInstruction(uint8_t opcode) { case 0xE0: // CPX Immediate { - operand = Immediate(); + operand = Immediate(/*index_size=*/true); immediate = true; CPX(operand, immediate); break; @@ -803,7 +805,7 @@ void CPU::ExecuteInstruction(uint8_t opcode) { case 0x20: // JSR Absolute { - operand = Absolute(); + operand = Absolute(AccessType::Control); JSR(operand); break; } @@ -1504,10 +1506,13 @@ void CPU::LogInstructions(uint16_t PC, uint8_t opcode, uint16_t operand, instruction_log_.push_back(entry); } else { // Log the address and opcode. - std::cout << "$" << std::uppercase << std::setw(2) << std::setfill('0') - << static_cast(PB) << ":" << std::hex << PC << ": 0x" - << std::hex << static_cast(opcode) << " " - << opcode_to_mnemonic.at(opcode) << " "; + std::cout << "\033[1;36m" + << "$" << std::uppercase << std::setw(2) << std::setfill('0') + << static_cast(PB) << ":" << std::hex << PC; + std::cout << " \033[1;32m" + << ": 0x" << std::hex << static_cast(opcode) << " "; + std::cout << " \033[1;35m" << opcode_to_mnemonic.at(opcode) << " " + << "\033[0m"; // Log the operand. if (operand) { @@ -1543,11 +1548,15 @@ uint8_t CPU::GetInstructionLength(uint8_t opcode) { case 0xFC: // JSR Absolute Indexed Indirect case 0xDC: // JMP Absolute Indirect Long case 0x6B: // RTL - case 0x80: // BRA Relative + case 0x82: // BRL Relative Long PC = next_pc_; return 0; + case 0x80: // BRA Relative + PC += next_pc_; + return 2; + case 0x60: // RTS PC = last_call_frame_; return 0; @@ -1584,11 +1593,9 @@ uint8_t CPU::GetInstructionLength(uint8_t opcode) { case 0xD0: // BNE Relative if (!GetZeroFlag()) { - PC = next_pc_; - return 0; - } else { - return 2; + PC += next_pc_; } + return 2; case 0x10: // BPL Relative if (!GetNegativeFlag()) { @@ -1776,16 +1783,18 @@ uint8_t CPU::GetInstructionLength(uint8_t opcode) { case 0x69: // ADC Immediate case 0x29: // AND Immediate case 0xC9: // CMP Immediate - case 0xE0: // CPX Immediate - case 0xC0: // CPY Immediate case 0x49: // EOR Immediate case 0xA9: // LDA Immediate - case 0xA2: // LDX Immediate - case 0xA0: // LDY Immediate case 0x09: // ORA Immediate case 0xE9: // SBC Immediate return GetAccumulatorSize() ? 2 : 3; + case 0xE0: // CPX Immediate + case 0xC0: // CPY Immediate + case 0xA2: // LDX Immediate + case 0xA0: // LDY Immediate + return GetIndexSize() ? 2 : 3; + case 0x0E: // ASL Absolute case 0x1E: // ASL Absolute Indexed, X case 0x2D: // AND Absolute diff --git a/src/app/emu/cpu.h b/src/app/emu/cpu.h index 1ce632da..584ae8a1 100644 --- a/src/app/emu/cpu.h +++ b/src/app/emu/cpu.h @@ -43,7 +43,7 @@ class CPU : public Memory, public Loggable, public core::ExperimentFlags { explicit CPU(Memory& mem, Clock& vclock) : memory(mem), clock(vclock) {} enum class UpdateMode { Run, Step, Pause }; - void Init() { clock.SetFrequency(kCpuClockSpeed); } + void Init(bool verbose = false) { clock.SetFrequency(kCpuClockSpeed); } void Update(UpdateMode mode = UpdateMode::Run, int stepCount = 1); @@ -306,7 +306,7 @@ class CPU : public Memory, public Loggable, public core::ExperimentFlags { // Data Low: First Operand Byte // // LDA #const - uint16_t Immediate(); + uint16_t Immediate(bool index_size = false); uint16_t StackRelative(); @@ -460,10 +460,10 @@ class CPU : public Memory, public Loggable, public core::ExperimentFlags { void COP(); // CPX: Compare X register - void CPX(uint16_t address, bool immediate = false); + void CPX(uint32_t address, bool immediate = false); // CPY: Compare Y register - void CPY(uint16_t address, bool immediate = false); + void CPY(uint32_t address, bool immediate = false); // DEC: Decrement memory void DEC(uint32_t address, bool accumulator = false);