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Implement ADC, SBC, CMP for SPC700, untested

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scawful
2023-08-20 23:46:26 -04:00
parent c5d47cbc19
commit 7619e5c977
1 changed files with 33 additions and 1 deletions
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34
src/app/emu/spc700.h
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@@ -189,7 +189,39 @@ class SPC700 {
PSW.N = (operand & 0x80); PSW.N = (operand & 0x80);
} }
// ADC SBC CMP // ADC
void ADC(uint8_t operand, bool isImmediate = false) {
uint8_t value = isImmediate ? imm() : operand;
uint16_t result = A + value + PSW.C;
PSW.V = ((A ^ result) & (value ^ result) & 0x80);
PSW.C = (result > 0xFF);
PSW.Z = ((result & 0xFF) == 0);
PSW.N = (result & 0x80);
PSW.H = ((A ^ value ^ result) & 0x10);
A = result & 0xFF;
}
// SBC
void SBC(uint8_t operand, bool isImmediate = false) {
uint8_t value = isImmediate ? imm() : operand;
uint16_t result = A - value - (1 - PSW.C);
PSW.V = ((A ^ result) & (A ^ value) & 0x80);
PSW.C = (result < 0x100);
PSW.Z = ((result & 0xFF) == 0);
PSW.N = (result & 0x80);
PSW.H = ((A ^ value ^ result) & 0x10);
A = result & 0xFF;
}
// CMP
void CMP(uint8_t operand, bool isImmediate = false) {
uint8_t value = isImmediate ? imm() : operand;
uint16_t result = A - value;
PSW.C = (result < 0x100);
PSW.Z = ((result & 0xFF) == 0);
PSW.N = (result & 0x80);
}
// AND OR EOR ASL LSR ROL XCN // AND OR EOR ASL LSR ROL XCN
// INC DEC // INC DEC
// MOVW INCW DECW ADDW SUBW CMPW MUL DIV // MOVW INCW DECW ADDW SUBW CMPW MUL DIV