Update Spc700, separate addressing and opcodes
This commit is contained in:
scawful
361
src/app/emu/audio/internal/addressing.cc
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361
src/app/emu/audio/internal/addressing.cc
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@@ -0,0 +1,361 @@
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#include "app/emu/audio/spc700.h"
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namespace yaze {
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namespace app {
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namespace emu {
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void Spc700::MOV(uint8_t& dest, uint8_t operand) {
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dest = operand;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::MOV_ADDR(uint16_t address, uint8_t operand) {
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write(address, operand);
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::ADC(uint8_t& dest, uint8_t operand) {
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uint16_t result = dest + operand + PSW.C;
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PSW.V = ((A ^ result) & (operand ^ result) & 0x80);
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PSW.C = (result > 0xFF);
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PSW.Z = ((result & 0xFF) == 0);
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PSW.N = (result & 0x80);
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PSW.H = ((A ^ operand ^ result) & 0x10);
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dest = result & 0xFF;
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}
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void Spc700::SBC(uint8_t& dest, uint8_t operand) {
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uint16_t result = dest - operand - (1 - PSW.C);
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PSW.V = ((dest ^ result) & (dest ^ operand) & 0x80);
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PSW.C = (result < 0x100);
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PSW.Z = ((result & 0xFF) == 0);
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PSW.N = (result & 0x80);
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PSW.H = ((dest ^ operand ^ result) & 0x10);
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dest = result & 0xFF;
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}
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void Spc700::CMP(uint8_t& dest, uint8_t operand) {
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uint16_t result = dest - operand;
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PSW.C = (result < 0x100);
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PSW.Z = ((result & 0xFF) == 0);
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PSW.N = (result & 0x80);
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}
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void Spc700::AND(uint8_t& dest, uint8_t operand) {
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dest &= operand;
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PSW.Z = (dest == 0);
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PSW.N = (dest & 0x80);
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}
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void Spc700::OR(uint8_t& dest, uint8_t operand) {
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dest |= operand;
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PSW.Z = (dest == 0);
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PSW.N = (dest & 0x80);
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}
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void Spc700::EOR(uint8_t& dest, uint8_t operand) {
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dest ^= operand;
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PSW.Z = (dest == 0);
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PSW.N = (dest & 0x80);
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}
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void Spc700::ASL(uint8_t operand) {
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PSW.C = (operand & 0x80);
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operand <<= 1;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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// A = value;
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}
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void Spc700::LSR(uint8_t& operand) {
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PSW.C = (operand & 0x01);
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operand >>= 1;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::ROL(uint8_t operand, bool isImmediate) {
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uint8_t value = isImmediate ? imm() : operand;
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uint8_t carry = PSW.C;
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PSW.C = (value & 0x80);
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value <<= 1;
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value |= carry;
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PSW.Z = (value == 0);
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PSW.N = (value & 0x80);
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// operand = value;
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}
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void Spc700::XCN(uint8_t operand, bool isImmediate) {
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uint8_t value = isImmediate ? imm() : operand;
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value = ((value & 0xF0) >> 4) | ((value & 0x0F) << 4);
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PSW.Z = (value == 0);
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PSW.N = (value & 0x80);
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// operand = value;
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}
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void Spc700::INC(uint8_t& operand) {
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operand++;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::DEC(uint8_t& operand) {
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operand--;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::MOVW(uint16_t& dest, uint16_t operand) {
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dest = operand;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x8000);
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}
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void Spc700::INCW(uint16_t& operand) {
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operand++;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x8000);
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}
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void Spc700::DECW(uint16_t& operand) {
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operand--;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x8000);
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}
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void Spc700::ADDW(uint16_t& dest, uint16_t operand) {
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uint32_t result = dest + operand;
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PSW.C = (result > 0xFFFF);
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PSW.Z = ((result & 0xFFFF) == 0);
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PSW.N = (result & 0x8000);
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PSW.V = ((dest ^ result) & (operand ^ result) & 0x8000);
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dest = result & 0xFFFF;
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}
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void Spc700::SUBW(uint16_t& dest, uint16_t operand) {
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uint32_t result = dest - operand;
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PSW.C = (result < 0x10000);
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PSW.Z = ((result & 0xFFFF) == 0);
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PSW.N = (result & 0x8000);
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PSW.V = ((dest ^ result) & (dest ^ operand) & 0x8000);
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dest = result & 0xFFFF;
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}
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void Spc700::CMPW(uint16_t operand) {
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uint32_t result = YA - operand;
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PSW.C = (result < 0x10000);
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PSW.Z = ((result & 0xFFFF) == 0);
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PSW.N = (result & 0x8000);
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}
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void Spc700::MUL(uint8_t operand) {
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uint16_t result = A * operand;
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YA = result;
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PSW.Z = (result == 0);
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PSW.N = (result & 0x8000);
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}
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void Spc700::DIV(uint8_t operand) {
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if (operand == 0) {
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// Handle divide by zero error
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return;
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}
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uint8_t quotient = A / operand;
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uint8_t remainder = A % operand;
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A = quotient;
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Y = remainder;
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PSW.Z = (quotient == 0);
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PSW.N = (quotient & 0x80);
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}
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void Spc700::BRA(int8_t offset) { PC += offset; }
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void Spc700::BEQ(int8_t offset) {
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if (PSW.Z) {
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PC += offset;
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}
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}
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void Spc700::BNE(int8_t offset) {
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if (!PSW.Z) {
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PC += offset;
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}
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}
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void Spc700::BCS(int8_t offset) {
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if (PSW.C) {
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PC += offset;
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}
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}
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void Spc700::BCC(int8_t offset) {
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if (!PSW.C) {
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PC += offset;
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}
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}
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void Spc700::BVS(int8_t offset) {
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if (PSW.V) {
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PC += offset;
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}
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}
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void Spc700::BVC(int8_t offset) {
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if (!PSW.V) {
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PC += offset;
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}
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}
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void Spc700::BMI(int8_t offset) {
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if (PSW.N) {
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PC += offset;
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}
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}
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void Spc700::BPL(int8_t offset) {
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if (!PSW.N) {
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PC += offset;
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}
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}
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void Spc700::BBS(uint8_t bit, uint8_t operand) {
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if (operand & (1 << bit)) {
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PC += rel();
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}
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}
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void Spc700::BBC(uint8_t bit, uint8_t operand) {
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if (!(operand & (1 << bit))) {
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PC += rel();
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}
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}
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// CBNE DBNZ
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// JMP
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void Spc700::JMP(uint16_t address) { PC = address; }
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void Spc700::CALL(uint16_t address) {
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uint16_t return_address = PC + 2;
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write(SP, return_address & 0xFF);
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write(SP - 1, (return_address >> 8) & 0xFF);
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SP -= 2;
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PC = address;
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}
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void Spc700::PCALL(uint8_t offset) {
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uint16_t return_address = PC + 2;
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write(SP, return_address & 0xFF);
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write(SP - 1, (return_address >> 8) & 0xFF);
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SP -= 2;
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PC += offset;
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}
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void Spc700::TCALL(uint8_t offset) {
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uint16_t return_address = PC + 2;
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write(SP, return_address & 0xFF);
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write(SP - 1, (return_address >> 8) & 0xFF);
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SP -= 2;
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PC = 0xFFDE + offset;
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}
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void Spc700::BRK() {
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uint16_t return_address = PC + 2;
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write(SP, return_address & 0xFF);
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write(SP - 1, (return_address >> 8) & 0xFF);
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SP -= 2;
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PC = 0xFFDE;
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}
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void Spc700::RET() {
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uint16_t return_address = read(SP) | (read(SP + 1) << 8);
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SP += 2;
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PC = return_address;
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}
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void Spc700::RETI() {
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uint16_t return_address = read(SP) | (read(SP + 1) << 8);
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SP += 2;
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PC = return_address;
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PSW.I = 1;
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}
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void Spc700::PUSH(uint8_t operand) {
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write(SP, operand);
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SP--;
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}
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void Spc700::POP(uint8_t& operand) {
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SP++;
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operand = read(SP);
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}
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void Spc700::SET1(uint8_t bit, uint8_t& operand) { operand |= (1 << bit); }
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void Spc700::CLR1(uint8_t bit, uint8_t& operand) { operand &= ~(1 << bit); }
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void Spc700::TSET1(uint8_t bit, uint8_t& operand) {
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PSW.C = (operand & (1 << bit));
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operand |= (1 << bit);
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}
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void Spc700::TCLR1(uint8_t bit, uint8_t& operand) {
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PSW.C = (operand & (1 << bit));
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operand &= ~(1 << bit);
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}
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void Spc700::AND1(uint8_t bit, uint8_t& operand) {
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operand &= (1 << bit);
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::OR1(uint8_t bit, uint8_t& operand) {
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operand |= (1 << bit);
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::EOR1(uint8_t bit, uint8_t& operand) {
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operand ^= (1 << bit);
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::NOT1(uint8_t bit, uint8_t& operand) {
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operand ^= (1 << bit);
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void Spc700::MOV1(uint8_t bit, uint8_t& operand) {
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PSW.C = (operand & (1 << bit));
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operand |= (1 << bit);
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}
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void Spc700::CLRC() { PSW.C = 0; }
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void Spc700::SETC() { PSW.C = 1; }
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void Spc700::NOTC() { PSW.C = !PSW.C; }
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void Spc700::CLRV() { PSW.V = 0; }
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void Spc700::CLRP() { PSW.P = 0; }
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void Spc700::SETP() { PSW.P = 1; }
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void Spc700::EI() { PSW.I = 1; }
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void Spc700::DI() { PSW.I = 0; }
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void Spc700::NOP() { PC++; }
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void Spc700::SLEEP() {}
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void Spc700::STOP() {}
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} // namespace emu
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} // namespace app
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} // namespace yaze
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263
src/app/emu/audio/internal/opcodes.h
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263
src/app/emu/audio/internal/opcodes.h
Normal file
@@ -0,0 +1,263 @@
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#pragma once
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#include <cstdint>
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#include <string>
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#include <unordered_map>
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const std::unordered_map<uint8_t, std::string> spc_opcode_map = {
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{0x00, "NOP"},
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{0x01, "TCALL0"},
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{0x02, "SET1 direct.0"},
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{0x03, "BBS direct.0,rel"},
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{0x04, "OR A,direct"},
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{0x05, "OR A,abs"},
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{0x06, "OR A,(X)"},
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{0x07, "OR A,(direct+X)"},
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{0x08, "OR A,#imm"},
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{0x09, "OR direct,imm"},
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{0x0A, "OR1 C,membit"},
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{0x0B, "ASL direct"},
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{0x0C, "ASL abs"},
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{0x0D, "PUSH PSW"},
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{0x0E, "TSET1 abs"},
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{0x0F, "BRK"},
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{0x10, "BPL rel"},
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{0x11, "TCALL1"},
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{0x12, "CLR1 direct.0"},
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{0x13, "BBC direct.0,rel"},
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{0x14, "OR A,direct+X"},
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{0x15, "OR A,abs+X"},
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{0x16, "OR A,abs+Y"},
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{0x17, "OR A,(direct)+Y"},
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{0x18, "OR direct,direct"},
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{0x19, "OR (X),(Y)"},
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{0x1A, "DECW direct"},
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{0x1B, "ASL direct+X"},
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{0x1C, "ASL A"},
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{0x1D, "DEC X"},
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{0x1E, "CMP X,abs"},
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{0x1F, "JMP (abs+X)"},
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{0x20, "CLRP"},
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{0x21, "TCALL2"},
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{0x22, "SET1 direct.1"},
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{0x23, "BBS direct.1,rel"},
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{0x24, "AND A,direct"},
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{0x25, "AND A,abs"},
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{0x26, "AND A,(X)"},
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{0x27, "AND A,(direct+X)"},
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{0x28, "AND A,#imm"},
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{0x29, "AND direct,imm"},
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{0x2A, "OR1 C,/membit"},
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{0x2B, "ROL direct"},
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{0x2C, "ROL abs"},
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{0x2D, "PUSH A"},
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{0x2E, "CBNE direct,rel"},
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{0x2F, "BRA rel"},
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{0x30, "BMI rel"},
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{0x31, "TCALL3"},
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{0x32, "CLR1 direct.1"},
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{0x33, "BBC direct.1,rel"},
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{0x34, "AND A,direct+X"},
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{0x35, "AND A,abs+X"},
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{0x36, "AND A,abs+Y"},
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{0x37, "AND A,(direct)+Y"},
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{0x38, "AND direct,direct"},
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{0x39, "AND (X),(Y)"},
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{0x3A, "INCW direct"},
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{0x3B, "ROL direct+X"},
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{0x3C, "ROL A"},
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{0x3D, "INC X"},
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{0x3E, "CMP X,direct"},
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{0x3F, "CALL abs"},
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{0x40, "SETP"},
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{0x41, "TCALL4"},
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{0x42, "SET1 direct.2"},
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{0x43, "BBS direct.2,rel"},
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{0x44, "EOR A,direct"},
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{0x45, "EOR A,abs"},
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{0x46, "EOR A,(X)"},
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{0x47, "EOR A,(direct+X)"},
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{0x48, "EOR A,#imm"},
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{0x49, "EOR direct,imm"},
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{0x4A, "AND1 C,membit"},
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{0x4B, "LSR direct"},
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{0x4C, "LSR abs"},
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{0x4D, "PUSH X"},
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{0x4E, "TCLR1 abs"},
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{0x4F, "PCALL addr"},
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{0x50, "BVC rel"},
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{0x51, "TCALL5"},
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{0x52, "CLR1 direct.2"},
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{0x53, "BBC direct.2,rel"},
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{0x54, "EOR A,direct+X"},
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{0x55, "EOR A,abs+X"},
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{0x56, "EOR A,abs+Y"},
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{0x57, "EOR A,(direct)+Y"},
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{0x58, "EOR direct,direct"},
|
||||
{0x59, "EOR (X),(Y)"},
|
||||
{0x5A, "CMPW YA,direct"},
|
||||
{0x5B, "LSR direct+X"},
|
||||
{0x5C, "LSR A"},
|
||||
{0x5D, "MOV X,A"},
|
||||
{0x5E, "CMP Y,abs"},
|
||||
{0x5F, "JMP abs"},
|
||||
{0x60, "CLRC"},
|
||||
{0x61, "TCALL6"},
|
||||
{0x62, "SET1 direct.3"},
|
||||
{0x63, "BBS direct.3,rel"},
|
||||
{0x64, "CMP A,direct"},
|
||||
{0x65, "CMP A,abs"},
|
||||
{0x66, "CMP A,(X)"},
|
||||
{0x67, "CMP A,(direct+X)"},
|
||||
{0x68, "CMP A,#imm"},
|
||||
{0x69, "CMP direct,imm"},
|
||||
{0x6A, "AND1 C,/membit"},
|
||||
{0x6B, "ROR direct"},
|
||||
{0x6C, "ROR abs"},
|
||||
{0x6D, "PUSH Y"},
|
||||
{0x6E, "DBNZ direct,rel"},
|
||||
{0x6F, "RET"},
|
||||
{0x70, "BVS rel"},
|
||||
{0x71, "TCALL7"},
|
||||
{0x72, "CLR1 direct.3"},
|
||||
{0x73, "BBC direct.3,rel"},
|
||||
{0x74, "CMP A,direct+X"},
|
||||
{0x75, "CMP A,abs+X"},
|
||||
{0x76, "CMP A,abs+Y"},
|
||||
{0x77, "CMP A,(direct)+Y"},
|
||||
{0x78, "CMP direct,direct"},
|
||||
{0x79, "CMP (X),(Y)"},
|
||||
{0x7A, "ADDW YA,direct"},
|
||||
{0x7B, "ROR direct+X"},
|
||||
{0x7C, "ROR A"},
|
||||
{0x7D, "MOV A,X"},
|
||||
{0x7E, "CMP Y,direct"},
|
||||
{0x7F, "RETI"},
|
||||
{0x80, "SETC"},
|
||||
{0x81, "TCALL8"},
|
||||
{0x82, "SET1 direct.4"},
|
||||
{0x83, "BBS direct.4,rel"},
|
||||
{0x84, "ADC A,direct"},
|
||||
{0x85, "ADC A,abs"},
|
||||
{0x86, "ADC A,(X)"},
|
||||
{0x87, "ADC A,(direct+X)"},
|
||||
{0x88, "ADC A,#imm"},
|
||||
{0x89, "ADC direct,imm"},
|
||||
{0x8A, "EOR1 C,membit"},
|
||||
{0x8B, "DEC direct"},
|
||||
{0x8C, "DEC abs"},
|
||||
{0x8D, "MOV Y,#imm"},
|
||||
{0x8E, "POP PSW"},
|
||||
{0x8F, "MOV direct,#imm"},
|
||||
{0x90, "BCC rel"},
|
||||
{0x91, "TCALL9"},
|
||||
{0x92, "CLR1 direct.4"},
|
||||
{0x93, "BBC direct.4,rel"},
|
||||
{0x94, "ADC A,direct+X"},
|
||||
{0x95, "ADC A,abs+X"},
|
||||
{0x96, "ADC A,abs+Y"},
|
||||
{0x97, "ADC A,(direct)+Y"},
|
||||
{0x98, "ADC direct,direct"},
|
||||
{0x99, "ADC (X),(Y)"},
|
||||
{0x9A, "SUBW YA,direct"},
|
||||
{0x9B, "DEC direct+X"},
|
||||
{0x9C, "DEC A"},
|
||||
{0x9D, "MOV X,SP"},
|
||||
{0x9E, "DIV YA,X"},
|
||||
{0x9F, "XCN A"},
|
||||
{0xA0, "EI"},
|
||||
{0xA1, "TCALL10"},
|
||||
{0xA2, "SET1 direct.5"},
|
||||
{0xA3, "BBS direct.5,rel"},
|
||||
{0xA4, "SBC A,direct"},
|
||||
{0xA5, "SBC A,abs"},
|
||||
{0xA6, "SBC A,(X)"},
|
||||
{0xA7, "SBC A,(direct+X)"},
|
||||
{0xA8, "SBC A,#imm"},
|
||||
{0xA9, "SBC direct,imm"},
|
||||
{0xAA, "MOV1 C,membit"},
|
||||
{0xAB, "INC direct"},
|
||||
{0xAC, "INC abs"},
|
||||
{0xAD, "CMP Y,#imm"},
|
||||
{0xAE, "POP A"},
|
||||
{0xAF, "MOV (X)+,A"},
|
||||
{0xB0, "BCS rel"},
|
||||
{0xB1, "TCALL11"},
|
||||
{0xB2, "CLR1 direct.5"},
|
||||
{0xB3, "BBC direct.5,rel"},
|
||||
{0xB4, "SBC A,direct+X"},
|
||||
{0xB5, "SBC A,abs+X"},
|
||||
{0xB6, "SBC A,abs+Y"},
|
||||
{0xB7, "SBC A,(direct)+Y"},
|
||||
{0xB8, "SBC direct,direct"},
|
||||
{0xB9, "SBC (X),(Y)"},
|
||||
{0xBA, "MOVW YA,direct"},
|
||||
{0xBB, "INC direct+X"},
|
||||
{0xBC, "INC A"},
|
||||
{0xBD, "MOV SP,X"},
|
||||
{0xBE, "DAS"},
|
||||
{0xBF, "MOV A,(X)+"},
|
||||
{0xC0, "DI"},
|
||||
{0xC1, "TCALL12"},
|
||||
{0xC2, "SET1 direct.6"},
|
||||
{0xC3, "BBS direct.6,rel"},
|
||||
{0xC4, "MOV direct,A"},
|
||||
{0xC5, "MOV abs,A"},
|
||||
{0xC6, "MOV (X),A"},
|
||||
{0xC7, "MOV (direct+X),A"},
|
||||
{0xC8, "CMP X,#imm"},
|
||||
{0xC9, "MOV abs,X"},
|
||||
{0xCA, "MOV1 membit,C"},
|
||||
{0xCB, "MOV direct,Y"},
|
||||
{0xCC, "MOV abs,Y"},
|
||||
{0xCD, "MOV X,#imm"},
|
||||
{0xCE, "POP X"},
|
||||
{0xCF, "MUL YA"},
|
||||
{0xD0, "BNE rel"},
|
||||
{0xD1, "TCALL13"},
|
||||
{0xD2, "CLR1 direct.6"},
|
||||
{0xD3, "BBC direct.6,rel"},
|
||||
{0xD4, "MOV direct+X,A"},
|
||||
{0xD5, "MOV abs+X,A"},
|
||||
{0xD6, "MOV abs+Y,A"},
|
||||
{0xD7, "MOV (direct)+Y,A"},
|
||||
{0xD8, "MOV direct,X"},
|
||||
{0xD9, "MOV direct+Y,X"},
|
||||
{0xDA, "MOVW direct,YA"},
|
||||
{0xDB, "MOV direct+X,Y"},
|
||||
{0xDC, "DEC Y"},
|
||||
{0xDD, "MOV A,Y"},
|
||||
{0xDE, "CBNE direct+X,rel"},
|
||||
{0xDF, "DAA"},
|
||||
{0xE0, "CLRV"},
|
||||
{0xE1, "TCALL14"},
|
||||
{0xE2, "SET1 direct.7"},
|
||||
{0xE3, "BBS direct.7,rel"},
|
||||
{0xE4, "MOV A,direct"},
|
||||
{0xE5, "MOV A,abs"},
|
||||
{0xE6, "MOV A,(X)"},
|
||||
{0xE7, "MOV A,(direct+X)"},
|
||||
{0xE8, "MOV A,#imm"},
|
||||
{0xE9, "MOV X,abs"},
|
||||
{0xEA, "NOT1 membit"},
|
||||
{0xEB, "MOV Y,direct"},
|
||||
{0xEC, "MOV Y,abs"},
|
||||
{0xED, "NOTC"},
|
||||
{0xEE, "POP Y"},
|
||||
{0xEF, "SLEEP"},
|
||||
{0xF0, "BEQ rel"},
|
||||
{0xF1, "TCALL15"},
|
||||
{0xF2, "CLR1 direct.7"},
|
||||
{0xF3, "BBC direct.7,rel"},
|
||||
{0xF4, "MOV A,direct+X"},
|
||||
{0xF5, "MOV A,abs+X"},
|
||||
{0xF6, "MOV A,abs+Y"},
|
||||
{0xF7, "MOV A,(direct)+Y"},
|
||||
{0xF8, "MOV X,direct"},
|
||||
{0xF9, "MOV X,direct+Y"},
|
||||
{0xFA, "MOV direct,S"},
|
||||
{0xFB, "MOV Y,direct+X"},
|
||||
{0xFC, "INC Y"},
|
||||
{0xFD, "MOV Y,A"},
|
||||
{0xFE, "DBNZ Y,rel"},
|
||||
{0xFF, "STOP"}};
|
||||
Reference in New Issue
Block a user