Update Spc700, separate addressing and opcodes
This commit is contained in:
scawful
@@ -3,6 +3,7 @@
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#include <cstdint>
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#include <iostream>
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#include <unordered_map>
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#include <vector>
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namespace yaze {
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@@ -38,23 +39,32 @@ class AudioRamImpl : public AudioRam {
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}
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};
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class SPC700 {
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class Spc700 {
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private:
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AudioRam& aram_;
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std::vector<std::string> log_;
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const uint8_t ipl_rom_[64]{
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0xCD, 0xEF, 0xBD, 0xE8, 0x00, 0xC6, 0x1D, 0xD0, 0xFC, 0x8F, 0xAA,
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0xF4, 0x8F, 0xBB, 0xF5, 0x78, 0xCC, 0xF4, 0xD0, 0xFB, 0x2F, 0x19,
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0xEB, 0xF4, 0xD0, 0xFC, 0x7E, 0xF4, 0xD0, 0x0B, 0xE4, 0xF5, 0xCB,
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0xF4, 0xD7, 0x00, 0xFC, 0xD0, 0xF3, 0xAB, 0x01, 0x10, 0xEF, 0x7E,
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0xF4, 0x10, 0xEB, 0xBA, 0xF6, 0xDA, 0x00, 0xBA, 0xF4, 0xC4, 0xF4,
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0xDD, 0x5D, 0xD0, 0xDB, 0x1F, 0x00, 0x00, 0xC0, 0xFF};
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public:
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explicit SPC700(AudioRam& aram) : aram_(aram) {}
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explicit Spc700(AudioRam& aram) : aram_(aram) {}
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uint8_t test_register_;
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uint8_t control_register_;
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uint8_t dsp_address_register_;
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// Registers
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uint8_t A; // 8-bit accumulator
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uint8_t X; // 8-bit index
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uint8_t Y; // 8-bit index
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uint16_t YA; // 16-bit pair of A (lsb) and Y (msb)
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uint16_t PC; // program counter
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uint8_t SP; // stack pointer
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uint8_t A = 0; // 8-bit accumulator
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uint8_t X = 0; // 8-bit index
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uint8_t Y = 0; // 8-bit index
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uint16_t YA = 0; // 16-bit pair of A (lsb) and Y (msb)
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uint16_t PC = 0; // program counter
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uint8_t SP = 0; // stack pointer
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struct Flags {
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uint8_t N : 1; // Negative flag
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@@ -68,11 +78,30 @@ class SPC700 {
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};
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Flags PSW; // Processor status word
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uint8_t FlagsToByte(Flags flags) {
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return (flags.N << 7) | (flags.V << 6) | (flags.P << 5) | (flags.B << 4) |
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(flags.H << 3) | (flags.I << 2) | (flags.Z << 1) | (flags.C);
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}
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Flags ByteToFlags(uint8_t byte) {
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Flags flags;
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flags.N = (byte & 0x80) >> 7;
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flags.V = (byte & 0x40) >> 6;
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flags.P = (byte & 0x20) >> 5;
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flags.B = (byte & 0x10) >> 4;
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flags.H = (byte & 0x08) >> 3;
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flags.I = (byte & 0x04) >> 2;
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flags.Z = (byte & 0x02) >> 1;
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flags.C = (byte & 0x01);
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return flags;
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}
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void Reset();
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void Notify(uint32_t address, uint8_t data);
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void BootIplRom();
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void ExecuteInstructions(uint8_t opcode);
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void LogInstruction(uint16_t initial_pc, uint8_t opcode);
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// Read a byte from the memory-mapped registers
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uint8_t read(uint16_t address) {
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@@ -88,6 +117,7 @@ class SPC700 {
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return aram_.read(address);
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} else {
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// Handle IPL ROM or RAM reads here
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return ipl_rom_[address - 0xFFC0];
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}
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}
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return 0;
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@@ -203,277 +233,70 @@ class SPC700 {
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// ==========================================================================
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// Instructions
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// MOV
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void MOV(uint8_t& dest, uint8_t operand) {
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dest = operand;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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void MOV_ADDR(uint16_t address, uint8_t operand) {
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write(address, operand);
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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// ADC
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void ADC(uint8_t& dest, uint8_t operand) {
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uint16_t result = dest + operand + PSW.C;
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PSW.V = ((A ^ result) & (operand ^ result) & 0x80);
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PSW.C = (result > 0xFF);
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PSW.Z = ((result & 0xFF) == 0);
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PSW.N = (result & 0x80);
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PSW.H = ((A ^ operand ^ result) & 0x10);
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dest = result & 0xFF;
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}
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// SBC
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void SBC(uint8_t& dest, uint8_t operand) {
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uint16_t result = dest - operand - (1 - PSW.C);
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PSW.V = ((dest ^ result) & (dest ^ operand) & 0x80);
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PSW.C = (result < 0x100);
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PSW.Z = ((result & 0xFF) == 0);
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PSW.N = (result & 0x80);
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PSW.H = ((dest ^ operand ^ result) & 0x10);
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dest = result & 0xFF;
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}
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// CMP
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void CMP(uint8_t& dest, uint8_t operand) {
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uint16_t result = dest - operand;
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PSW.C = (result < 0x100);
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PSW.Z = ((result & 0xFF) == 0);
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PSW.N = (result & 0x80);
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}
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// AND
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void AND(uint8_t& dest, uint8_t operand) {
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dest &= operand;
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PSW.Z = (dest == 0);
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PSW.N = (dest & 0x80);
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}
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// OR
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void OR(uint8_t& dest, uint8_t operand) {
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dest |= operand;
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PSW.Z = (dest == 0);
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PSW.N = (dest & 0x80);
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}
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// EOR
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void EOR(uint8_t& dest, uint8_t operand) {
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dest ^= operand;
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PSW.Z = (dest == 0);
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PSW.N = (dest & 0x80);
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}
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// ASL
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void ASL(uint8_t operand) {
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PSW.C = (operand & 0x80);
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operand <<= 1;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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// A = value;
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}
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// LSR
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void LSR(uint8_t& operand) {
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PSW.C = (operand & 0x01);
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operand >>= 1;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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// ROL
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void ROL(uint8_t operand, bool isImmediate = false) {
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uint8_t value = isImmediate ? imm() : operand;
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uint8_t carry = PSW.C;
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PSW.C = (value & 0x80);
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value <<= 1;
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value |= carry;
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PSW.Z = (value == 0);
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PSW.N = (value & 0x80);
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// operand = value;
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}
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// XCN
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void XCN(uint8_t operand, bool isImmediate = false) {
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uint8_t value = isImmediate ? imm() : operand;
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value = ((value & 0xF0) >> 4) | ((value & 0x0F) << 4);
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PSW.Z = (value == 0);
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PSW.N = (value & 0x80);
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// operand = value;
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}
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// INC
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void INC(uint8_t& operand) {
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operand++;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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// DEC
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void DEC(uint8_t& operand) {
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operand--;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x80);
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}
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// MOVW
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void MOVW(uint16_t& dest, uint16_t operand) {
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dest = operand;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x8000);
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}
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// INCW
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void INCW(uint16_t& operand) {
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operand++;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x8000);
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}
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// DECW
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void DECW(uint16_t& operand) {
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operand--;
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PSW.Z = (operand == 0);
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PSW.N = (operand & 0x8000);
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}
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// ADDW
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void ADDW(uint16_t& dest, uint16_t operand) {
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uint32_t result = dest + operand;
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PSW.C = (result > 0xFFFF);
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PSW.Z = ((result & 0xFFFF) == 0);
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PSW.N = (result & 0x8000);
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PSW.V = ((dest ^ result) & (operand ^ result) & 0x8000);
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dest = result & 0xFFFF;
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}
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// SUBW
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void SUBW(uint16_t& dest, uint16_t operand) {
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uint32_t result = dest - operand;
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PSW.C = (result < 0x10000);
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PSW.Z = ((result & 0xFFFF) == 0);
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PSW.N = (result & 0x8000);
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PSW.V = ((dest ^ result) & (dest ^ operand) & 0x8000);
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dest = result & 0xFFFF;
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}
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// CMPW
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void CMPW(uint16_t operand) {
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uint32_t result = YA - operand;
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PSW.C = (result < 0x10000);
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PSW.Z = ((result & 0xFFFF) == 0);
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PSW.N = (result & 0x8000);
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}
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// MUL
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void MUL(uint8_t operand) {
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uint16_t result = A * operand;
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YA = result;
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PSW.Z = (result == 0);
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PSW.N = (result & 0x8000);
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}
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// DIV
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void DIV(uint8_t operand) {
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if (operand == 0) {
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// Handle divide by zero error
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return;
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}
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uint8_t quotient = A / operand;
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uint8_t remainder = A % operand;
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A = quotient;
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Y = remainder;
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PSW.Z = (quotient == 0);
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PSW.N = (quotient & 0x80);
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}
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// DAA
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// BRA
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void BRA(int8_t offset) { PC += offset; }
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// BEQ
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void BEQ(int8_t offset) {
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if (PSW.Z) {
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PC += offset;
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}
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}
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// BNE
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void BNE(int8_t offset) {
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if (!PSW.Z) {
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PC += offset;
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}
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}
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// BCS
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void BCS(int8_t offset) {
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if (PSW.C) {
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PC += offset;
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}
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}
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// BCC
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void BCC(int8_t offset) {
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if (!PSW.C) {
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PC += offset;
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}
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}
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// BVS
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void BVS(int8_t offset) {
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if (PSW.V) {
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PC += offset;
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}
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}
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// BVC
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void BVC(int8_t offset) {
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if (!PSW.V) {
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PC += offset;
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}
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}
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// BMI
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void BMI(int8_t offset) {
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if (PSW.N) {
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PC += offset;
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}
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}
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// BPL
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void BPL(int8_t offset) {
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if (!PSW.N) {
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PC += offset;
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}
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}
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// BBS
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void BBS(uint8_t bit, uint8_t operand) {
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if (operand & (1 << bit)) {
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PC += rel();
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}
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}
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// BBC
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void BBC(uint8_t bit, uint8_t operand) {
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if (!(operand & (1 << bit))) {
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PC += rel();
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}
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}
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void MOV(uint8_t& dest, uint8_t operand);
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void MOV_ADDR(uint16_t address, uint8_t operand);
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void ADC(uint8_t& dest, uint8_t operand);
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void SBC(uint8_t& dest, uint8_t operand);
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void CMP(uint8_t& dest, uint8_t operand);
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void AND(uint8_t& dest, uint8_t operand);
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void OR(uint8_t& dest, uint8_t operand);
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void EOR(uint8_t& dest, uint8_t operand);
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void ASL(uint8_t operand);
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void LSR(uint8_t& operand);
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void ROL(uint8_t operand, bool isImmediate = false);
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void XCN(uint8_t operand, bool isImmediate = false);
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void INC(uint8_t& operand);
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void DEC(uint8_t& operand);
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void MOVW(uint16_t& dest, uint16_t operand);
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void INCW(uint16_t& operand);
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void DECW(uint16_t& operand);
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void ADDW(uint16_t& dest, uint16_t operand);
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void SUBW(uint16_t& dest, uint16_t operand);
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void CMPW(uint16_t operand);
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void MUL(uint8_t operand);
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void DIV(uint8_t operand);
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void BRA(int8_t offset);
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void BEQ(int8_t offset);
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void BNE(int8_t offset);
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void BCS(int8_t offset);
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void BCC(int8_t offset);
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void BVS(int8_t offset);
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void BVC(int8_t offset);
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void BMI(int8_t offset);
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void BPL(int8_t offset);
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void BBS(uint8_t bit, uint8_t operand);
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void BBC(uint8_t bit, uint8_t operand);
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void JMP(uint16_t address);
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void CALL(uint16_t address);
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void PCALL(uint8_t offset);
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void TCALL(uint8_t offset);
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void BRK();
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void RET();
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void RETI();
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void PUSH(uint8_t operand);
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void POP(uint8_t& operand);
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void SET1(uint8_t bit, uint8_t& operand);
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void CLR1(uint8_t bit, uint8_t& operand);
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void TSET1(uint8_t bit, uint8_t& operand);
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void TCLR1(uint8_t bit, uint8_t& operand);
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void AND1(uint8_t bit, uint8_t& operand);
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void OR1(uint8_t bit, uint8_t& operand);
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void EOR1(uint8_t bit, uint8_t& operand);
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void NOT1(uint8_t bit, uint8_t& operand);
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void MOV1(uint8_t bit, uint8_t& operand);
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void CLRC();
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void SETC();
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void NOTC();
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void CLRV();
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void CLRP();
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void SETP();
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void EI();
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void DI();
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void NOP();
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void SLEEP();
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void STOP();
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// CBNE DBNZ
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// JMP
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void JMP(uint16_t address) { PC = address; }
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// CALL PCALL TCALL BRK RET RETI
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// PUSH POP
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// SET1 CLR1 TSET1 TCLR1 AND1 OR1 EOR1 NOT1 MOV1
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// CLRC SETC NOTC CLRV CLRP SETP EI DI
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// NOP SLEEP STOP
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};
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} // namespace emu
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