feat: Enhance APU and SPC700 Logging and Instruction Handling
- Updated APU boot ROM comments for clarity and completeness, including details on multi-byte transfer acknowledgments. - Improved logging in APU and SPC700 classes to provide comprehensive tracing during execution, particularly for transfer protocols and MOVS instructions. - Refactored MOVS, MOVSX, and MOVSY methods to use consistent address handling, enhancing readability and maintainability. - Added conditional logging for specific addresses to aid in debugging and tracking state changes during instruction execution.
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@@ -16,14 +16,15 @@ namespace emu {
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static const double apuCyclesPerMaster = (32040 * 32) / (1364 * 262 * 60.0);
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static const double apuCyclesPerMasterPal = (32040 * 32) / (1364 * 312 * 50.0);
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// Standard SNES IPL ROM (64 bytes at $FFC0-$FFFF)
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// Verified correct - matches hardware dumps
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// Complete SNES IPL ROM (64 bytes at $FFC0-$FFFF)
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// Includes counter acknowledgment writes for multi-byte transfers (Step 3 protocol)
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// Reset vector at $FFFE-$FFFF points to $FFC0
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static const uint8_t bootRom[0x40] = {
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0xcd, 0xef, 0xbd, 0xe8, 0x00, 0xc6, 0x1d, 0xd0, 0xfc, 0x8f, 0xaa,
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0xf4, 0x8f, 0xbb, 0xf5, 0xe4, 0xf4, 0x68, 0xcc, 0xd0, 0xfa, 0x2f,
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0x19, 0xeb, 0xf4, 0xd0, 0xfc, 0x7e, 0xf4, 0xd0, 0x0b, 0xe4, 0xf5,
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0xcb, 0xf4, 0xd7, 0x00, 0xfc, 0xd0, 0xf3, 0xab, 0x01, 0x10, 0xef,
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0x7e, 0xf4, 0x10, 0xeb, 0xba, 0xf6, 0xda, 0x00, 0xba, 0xf4, 0xc4,
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0x19, 0xeb, 0xf4, 0xd0, 0xfc, 0x7e, 0xf4, 0xd0, 0x0d, 0xe4, 0xf5,
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0xcb, 0xf4, 0xd7, 0x00, 0xfc, 0xcb, 0xf4, 0xd0, 0xf1, 0xab, 0x01,
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0x10, 0xed, 0x7e, 0xf4, 0xba, 0xf6, 0xda, 0x00, 0xba, 0xf4, 0xc4,
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0xf4, 0xdd, 0x5d, 0xd0, 0xdb, 0x1f, 0x00, 0xc0, 0xff};
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// Helper to reset the cycle tracking on emulator reset
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@@ -187,11 +188,7 @@ uint8_t Apu::Read(uint16_t adr) {
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void Apu::Write(uint16_t adr, uint8_t val) {
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static int port_write_count = 0;
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// Debug: Log ALL writes to F4 to diagnose missing echo
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static int f4_write_count = 0;
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if (adr == 0xF4 && f4_write_count++ < 10) {
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LOG_INFO("APU", "Write() called for $F4 = $%02X at PC=$%04X", val, spc700_.PC);
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}
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switch (adr) {
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case 0xf0: {
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break; // test register
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