backend-infra-engineer: Release v0.3.0 snapshot

test/emu/audio/apu_test.cc

@@ -0,0 +1,134 @@
+#include "app/emu/audio/apu.h"
+#include "app/emu/memory/memory.h"
+
+#include <gmock/gmock-nice-strict.h>
+#include <gmock/gmock.h>
+#include <gtest/gtest.h>
+
+namespace yaze {
+namespace test {
+
+using testing::_;
+using testing::Return;
+using yaze::emu::Apu;
+using yaze::emu::MemoryImpl;
+
+class ApuTest : public ::testing::Test {
+ protected:
+  void SetUp() override {
+    memory_ = std::make_unique<MemoryImpl>();
+    apu_ = std::make_unique<Apu>(*memory_);
+    apu_->Init();
+  }
+
+  std::unique_ptr<MemoryImpl> memory_;
+  std::unique_ptr<Apu> apu_;
+};
+
+// Test the IPL ROM handshake sequence timing
+TEST_F(ApuTest, IplRomHandshakeTiming) {
+  // 1. Initial state check
+  EXPECT_EQ(apu_->Read(0x00) & 0x80, 0);  // Ready bit should be clear
+  
+  // 2. Start handshake
+  apu_->Write(0x00, 0x80);  // Set control register bit 7
+  
+  // 3. Wait for APU ready signal with cycle counting
+  int cycles = 0;
+  const int max_cycles = 1000;  // Maximum expected cycles for handshake
+  while (!(apu_->Read(0x00) & 0x80) && cycles < max_cycles) {
+    apu_->RunCycles(1);
+    cycles++;
+  }
+  
+  // 4. Verify timing constraints
+  EXPECT_LT(cycles, max_cycles);  // Should complete within max cycles
+  EXPECT_GT(cycles, 0);  // Should take some cycles
+  EXPECT_TRUE(apu_->Read(0x00) & 0x80);  // Ready bit should be set
+  
+  // 5. Verify handshake completion
+  EXPECT_EQ(apu_->GetStatus() & 0x80, 0x80);  // Ready bit in status register
+}
+
+// Test APU initialization sequence
+TEST_F(ApuTest, ApuInitialization) {
+  // 1. Check initial state
+  EXPECT_EQ(apu_->GetStatus(), 0x00);
+  EXPECT_EQ(apu_->GetControl(), 0x00);
+  
+  // 2. Initialize APU
+  apu_->Init();
+  
+  // 3. Verify initialization
+  EXPECT_EQ(apu_->GetStatus(), 0x00);
+  EXPECT_EQ(apu_->GetControl(), 0x00);
+  
+  // 4. Check DSP registers are initialized
+  for (int i = 0; i < 128; i++) {
+    EXPECT_EQ(apu_->Read(0x00 + i), 0x00);
+  }
+}
+
+// Test sample generation and timing
+TEST_F(ApuTest, SampleGenerationTiming) {
+  // 1. Generate samples
+  const int sample_count = 1024;
+  std::vector<int16_t> samples(sample_count);
+  
+  // 2. Measure timing
+  uint64_t start_cycles = apu_->GetCycles();
+  apu_->GetSamples(samples.data(), sample_count, false);
+  uint64_t end_cycles = apu_->GetCycles();
+  
+  // 3. Verify timing
+  EXPECT_GT(end_cycles - start_cycles, 0);
+  
+  // 4. Verify samples
+  bool has_non_zero = false;
+  for (int i = 0; i < sample_count; ++i) {
+    if (samples[i] != 0) {
+      has_non_zero = true;
+      break;
+    }
+  }
+  EXPECT_TRUE(has_non_zero);
+}
+
+// Test DSP register access timing
+TEST_F(ApuTest, DspRegisterAccessTiming) {
+  // 1. Write to DSP registers
+  const uint8_t test_value = 0x42;
+  uint64_t start_cycles = apu_->GetCycles();
+  
+  apu_->Write(0x00, 0x80);  // Set control register
+  apu_->Write(0x01, test_value);  // Write to DSP address
+  
+  uint64_t end_cycles = apu_->GetCycles();
+  
+  // 2. Verify timing
+  EXPECT_GT(end_cycles - start_cycles, 0);
+  
+  // 3. Verify register access
+  EXPECT_EQ(apu_->Read(0x01), test_value);
+}
+
+// Test DMA transfer timing
+TEST_F(ApuTest, DmaTransferTiming) {
+  // 1. Prepare DMA data
+  const uint8_t data[] = {0x01, 0x02, 0x03, 0x04};
+  
+  // 2. Measure DMA timing
+  uint64_t start_cycles = apu_->GetCycles();
+  apu_->WriteDma(0x00, data, sizeof(data));
+  uint64_t end_cycles = apu_->GetCycles();
+  
+  // 3. Verify timing
+  EXPECT_GT(end_cycles - start_cycles, 0);
+  
+  // 4. Verify DMA transfer
+  EXPECT_EQ(apu_->Read(0x00), 0x01);
+  EXPECT_EQ(apu_->Read(0x01), 0x02);
+}
+
+}  // namespace test
+}  // namespace yaze 

test/emu/audio/ipl_handshake_test.cc

@@ -0,0 +1,122 @@
+#include "app/emu/audio/apu.h"
+#include "app/emu/memory/memory.h"
+
+#include <gmock/gmock-nice-strict.h>
+#include <gmock/gmock.h>
+#include <gtest/gtest.h>
+
+namespace yaze {
+namespace test {
+
+using testing::_;
+using testing::Return;
+using yaze::emu::Apu;
+using yaze::emu::MemoryImpl;
+
+class IplHandshakeTest : public ::testing::Test {
+ protected:
+  void SetUp() override {
+    memory_ = std::make_unique<MemoryImpl>();
+    apu_ = std::make_unique<Apu>(*memory_);
+    apu_->Init();
+  }
+
+  std::unique_ptr<MemoryImpl> memory_;
+  std::unique_ptr<Apu> apu_;
+};
+
+// Test IPL ROM handshake timing with exact cycle counts
+TEST_F(IplHandshakeTest, ExactCycleTiming) {
+  // 1. Initial state
+  EXPECT_EQ(apu_->Read(0x00) & 0x80, 0);  // Ready bit should be clear
+  
+  // 2. Start handshake
+  apu_->Write(0x00, 0x80);  // Set control register bit 7
+  
+  // 3. Run exact number of cycles for handshake
+  const int expected_cycles = 64;  // Expected cycle count for handshake
+  apu_->RunCycles(expected_cycles);
+  
+  // 4. Verify handshake completed
+  EXPECT_TRUE(apu_->Read(0x00) & 0x80);  // Ready bit should be set
+  EXPECT_EQ(apu_->GetStatus() & 0x80, 0x80);  // Ready bit in status register
+}
+
+// Test IPL ROM handshake timing with cycle range
+TEST_F(IplHandshakeTest, CycleRange) {
+  // 1. Initial state
+  EXPECT_EQ(apu_->Read(0x00) & 0x80, 0);  // Ready bit should be clear
+  
+  // 2. Start handshake
+  apu_->Write(0x00, 0x80);  // Set control register bit 7
+  
+  // 3. Wait for handshake with cycle counting
+  int cycles = 0;
+  const int min_cycles = 32;  // Minimum expected cycles
+  const int max_cycles = 96;  // Maximum expected cycles
+  
+  while (!(apu_->Read(0x00) & 0x80) && cycles < max_cycles) {
+    apu_->RunCycles(1);
+    cycles++;
+  }
+  
+  // 4. Verify timing constraints
+  EXPECT_GE(cycles, min_cycles);  // Should take at least min_cycles
+  EXPECT_LE(cycles, max_cycles);  // Should complete within max_cycles
+  EXPECT_TRUE(apu_->Read(0x00) & 0x80);  // Ready bit should be set
+}
+
+// Test IPL ROM handshake with multiple attempts
+TEST_F(IplHandshakeTest, MultipleAttempts) {
+  const int num_attempts = 10;
+  std::vector<int> cycle_counts;
+  
+  for (int i = 0; i < num_attempts; i++) {
+    // Reset APU
+    apu_->Init();
+    
+    // Start handshake
+    apu_->Write(0x00, 0x80);
+    
+    // Count cycles until ready
+    int cycles = 0;
+    while (!(apu_->Read(0x00) & 0x80) && cycles < 1000) {
+      apu_->RunCycles(1);
+      cycles++;
+    }
+    
+    // Record cycle count
+    cycle_counts.push_back(cycles);
+    
+    // Verify handshake completed
+    EXPECT_TRUE(apu_->Read(0x00) & 0x80);
+  }
+  
+  // Verify cycle count consistency
+  int min_cycles = *std::min_element(cycle_counts.begin(), cycle_counts.end());
+  int max_cycles = *std::max_element(cycle_counts.begin(), cycle_counts.end());
+  EXPECT_LE(max_cycles - min_cycles, 2);  // Cycle count should be consistent
+}
+
+// Test IPL ROM handshake with interrupts
+TEST_F(IplHandshakeTest, WithInterrupts) {
+  // 1. Initial state
+  EXPECT_EQ(apu_->Read(0x00) & 0x80, 0);
+  
+  // 2. Enable interrupts
+  apu_->Write(0x00, 0x80 | 0x40);  // Set control register bits 7 and 6
+  
+  // 3. Run cycles with interrupts
+  int cycles = 0;
+  while (!(apu_->Read(0x00) & 0x80) && cycles < 1000) {
+    apu_->RunCycles(1);
+    cycles++;
+  }
+  
+  // 4. Verify handshake completed
+  EXPECT_TRUE(apu_->Read(0x00) & 0x80);
+  EXPECT_EQ(apu_->GetStatus() & 0x80, 0x80);
+}
+
+}  // namespace test
+}  // namespace yaze 

test/emu/ppu_test.cc

@@ -0,0 +1,54 @@
+#include "app/emu/video/ppu.h"
+
+#include <gmock/gmock.h>
+
+#include "mocks/mock_memory.h"
+
+namespace yaze {
+namespace test {
+
+using yaze::emu::MockMemory;
+using yaze::emu::BackgroundMode;
+using yaze::emu::PpuInterface;
+using yaze::emu::SpriteAttributes;
+using yaze::emu::Tilemap;
+
+/**
+ * @brief Mock Ppu class for testing
+ */
+class MockPpu : public PpuInterface {
+ public:
+  MOCK_METHOD(void, Write, (uint16_t address, uint8_t data), (override));
+  MOCK_METHOD(uint8_t, Read, (uint16_t address), (const, override));
+
+  std::vector<uint8_t> internalFrameBuffer;
+  std::vector<uint8_t> vram;
+  std::vector<SpriteAttributes> sprites;
+  std::vector<Tilemap> tilemaps;
+  BackgroundMode bgMode;
+};
+
+/**
+ * \test Test fixture for PPU unit tests
+ */
+class PpuTest : public ::testing::Test {
+ protected:
+  MockMemory mock_memory;
+  MockPpu mock_ppu;
+
+  PpuTest() {}
+
+  void SetUp() override {
+    ON_CALL(mock_ppu, Write(::testing::_, ::testing::_))
+        .WillByDefault([this](uint16_t address, uint8_t data) {
+          mock_ppu.vram[address] = data;
+        });
+
+    ON_CALL(mock_ppu, Read(::testing::_))
+        .WillByDefault(
+            [this](uint16_t address) { return mock_ppu.vram[address]; });
+  }
+};
+
+}  // namespace test
+}  // namespace yaze

test/emu/spc700_test.cc

@@ -0,0 +1,474 @@
+#include "app/emu/audio/spc700.h"
+
+#include <gmock/gmock-nice-strict.h>
+#include <gmock/gmock.h>
+#include <gtest/gtest.h>
+
+namespace yaze {
+namespace test {
+
+using testing::_;
+using testing::Return;
+using yaze::emu::ApuCallbacks;
+using yaze::emu::AudioRam;
+using yaze::emu::Spc700;
+
+/**
+ * @brief MockAudioRam is a mock class for the AudioRam class.
+ */
+class MockAudioRam : public AudioRam {
+ public:
+  MOCK_METHOD(void, reset, (), (override));
+  MOCK_METHOD(uint8_t, read, (uint16_t address), (const, override));
+  MOCK_METHOD(uint8_t&, mutable_read, (uint16_t address), (override));
+  MOCK_METHOD(void, write, (uint16_t address, uint8_t value), (override));
+
+  void SetupMemory(uint16_t address, const std::vector<uint8_t>& values) {
+    if (address > internal_audio_ram_.size()) {
+      internal_audio_ram_.resize(address + values.size());
+    }
+    int i = 0;
+    for (const auto& each : values) {
+      internal_audio_ram_[address + i] = each;
+      i++;
+    }
+  }
+
+  void SetUp() {
+    // internal_audio_ram_.resize(0x10000);  // 64 K (0x10000)
+    // std::fill(internal_audio_ram_.begin(), internal_audio_ram_.end(), 0);
+    ON_CALL(*this, read(_)).WillByDefault([this](uint16_t address) {
+      return internal_audio_ram_[address];
+    });
+    ON_CALL(*this, mutable_read(_))
+        .WillByDefault([this](uint16_t address) -> uint8_t& {
+          return internal_audio_ram_[address];
+        });
+    ON_CALL(*this, write(_, _))
+        .WillByDefault([this](uint16_t address, uint8_t value) {
+          internal_audio_ram_[address] = value;
+        });
+    ON_CALL(*this, reset()).WillByDefault([this]() {
+      std::fill(internal_audio_ram_.begin(), internal_audio_ram_.end(), 0);
+    });
+  }
+
+  std::vector<uint8_t> internal_audio_ram_ = std::vector<uint8_t>(0x10000, 0);
+};
+
+/**
+ * \test Spc700Test is a test fixture for the Spc700 class.
+ */
+class Spc700Test : public ::testing::Test {
+ public:
+  Spc700Test() = default;
+  void SetUp() override {
+    // Set up the mock
+    audioRAM.SetUp();
+
+    // Set the Spc700 to bank 01
+    spc700.PC = 0x0100;
+  }
+
+  testing::StrictMock<MockAudioRam> audioRAM;
+  ApuCallbacks callbacks_;
+  Spc700 spc700{callbacks_};
+};
+
+// ========================================================
+// 8-bit Move Memory to Register
+
+TEST_F(Spc700Test, MOV_A_Immediate) {
+  // MOV A, imm
+  uint8_t opcode = 0xE8;
+  uint8_t immediate_value = 0x5A;
+  audioRAM.SetupMemory(0x0100, {opcode, immediate_value});
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(immediate_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, immediate_value);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, MOV_A_X) {
+  // MOV A, X
+  uint8_t opcode = 0x7D;
+  spc700.X = 0x5A;
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, spc700.X);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, MOV_A_Y) {
+  // MOV A, Y
+  uint8_t opcode = 0xDD;
+  spc700.Y = 0x5A;
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, spc700.Y);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, MOV_A_dp) {
+  // MOV A, dp
+  uint8_t opcode = 0xE4;
+  uint8_t dp_value = 0x5A;
+  audioRAM.SetupMemory(0x005A, {0x42});
+  audioRAM.SetupMemory(0x0100, {opcode, dp_value});
+
+  EXPECT_CALL(audioRAM, read(_))
+      .WillOnce(Return(dp_value))
+      .WillOnce(Return(0x42));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x42);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, MOV_A_dp_plus_x) {
+  // MOV A, dp+X
+  uint8_t opcode = 0xF4;
+  uint8_t dp_value = 0x5A;
+  spc700.X = 0x01;
+  audioRAM.SetupMemory(0x005B, {0x42});
+  audioRAM.SetupMemory(0x0100, {opcode, dp_value});
+
+  EXPECT_CALL(audioRAM, read(_))
+      .WillOnce(Return(dp_value + spc700.X))
+      .WillOnce(Return(0x42));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x42);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, MOV_A_dp_indirect_plus_y) {
+  // MOV A, [dp]+Y
+  uint8_t opcode = 0xF7;
+  uint8_t dp_value = 0x5A;
+  spc700.Y = 0x01;
+  audioRAM.SetupMemory(0x005A, {0x00, 0x42});
+  audioRAM.SetupMemory(0x0100, {opcode, dp_value});
+  audioRAM.SetupMemory(0x4201, {0x69});
+
+  EXPECT_CALL(audioRAM, read(_))
+      .WillOnce(Return(dp_value))
+      .WillOnce(Return(0x4200))
+      .WillOnce(Return(0x69));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x69);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, MOV_A_dp_plus_x_indirect) {
+  // MOV A, [dp+X]
+  uint8_t opcode = 0xE7;
+  uint8_t dp_value = 0x5A;
+  spc700.X = 0x01;
+  audioRAM.SetupMemory(0x005B, {0x00, 0x42});
+  audioRAM.SetupMemory(0x0100, {opcode, dp_value});
+  audioRAM.SetupMemory(0x4200, {0x69});
+
+  EXPECT_CALL(audioRAM, read(_))
+      .WillOnce(Return(dp_value + 1))
+      .WillOnce(Return(0x4200))
+      .WillOnce(Return(0x69));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x69);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, MOV_A_abs) {
+  // MOV A, !abs
+  uint8_t opcode = 0xE5;
+  uint16_t abs_addr = 0x1234;
+  uint8_t abs_value = 0x5A;
+
+  EXPECT_CALL(audioRAM, read(_))
+      .WillOnce(Return(abs_addr & 0xFF))  // Low byte
+      .WillOnce(Return(abs_addr >> 8));   // High byte
+
+  EXPECT_CALL(audioRAM, read(abs_addr)).WillOnce(Return(abs_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, abs_value);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+// ============================================================================
+// 8-bit Move Register to Memory
+
+TEST_F(Spc700Test, MOV_Immediate) {
+  // MOV A, imm
+  uint8_t opcode = 0xE8;
+  uint8_t immediate_value = 0x5A;
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(immediate_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, immediate_value);
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+// ============================================================================
+
+TEST_F(Spc700Test, NOP_DoesNothing) {
+  // NOP opcode
+  uint8_t opcode = 0x00;
+
+  uint16_t initialPC = spc700.PC;
+  spc700.ExecuteInstructions(opcode);
+
+  // PC should increment by 1, no other changes
+  EXPECT_EQ(spc700.PC, initialPC + 1);
+  // Add checks for other registers if needed
+}
+
+TEST_F(Spc700Test, ADC_A_Immediate) {
+  // ADC A, #imm
+  uint8_t opcode = 0x88;
+  uint8_t immediate_value = 0x10;
+  spc700.A = 0x01;
+  spc700.PSW.C = 1;  // Assume carry is set
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(immediate_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  // Verify A, and flags
+  EXPECT_EQ(spc700.A, 0x12);  // 0x01 + 0x10 + 1 (carry)
+  // Check for other flags (Z, C, etc.) based on the result
+}
+
+TEST_F(Spc700Test, BEQ_BranchesIfZeroFlagSet) {
+  // BEQ rel
+  uint8_t opcode = 0xF0;
+  int8_t offset = 0x05;
+  spc700.PSW.Z = 1;  // Set Zero flag
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(offset));
+
+  uint16_t initialPC = spc700.PC + 1;
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.PC, initialPC + offset);
+}
+
+TEST_F(Spc700Test, STA_Absolute) {
+  // STA !abs
+  uint8_t opcode = 0x85;
+  uint16_t abs_addr = 0x1234;
+  spc700.A = 0x80;
+
+  // Set up the mock to return the address for the absolute addressing
+  EXPECT_CALL(audioRAM, read(_))
+      .WillOnce(Return(abs_addr & 0xFF))  // Low byte
+      .WillOnce(Return(abs_addr >> 8));   // High byte
+
+  spc700.ExecuteInstructions(opcode);
+}
+
+TEST_F(Spc700Test, ExecuteADCWithImmediate) {
+  // ADC A, imm
+  uint8_t opcode = 0x88;  // Replace with opcode for ADC A, imm
+  uint8_t immediate_value = 0x10;
+  spc700.A = 0x15;
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(immediate_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x25);  // 0x15 + 0x10
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+  EXPECT_EQ(spc700.PSW.C, 0);
+}
+
+TEST_F(Spc700Test, ExecuteBRA) {
+  // BRA
+  uint8_t opcode = 0x2F;
+  int8_t offset = 0x05;
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(offset));
+
+  // rel() moves the PC forward one after read
+  uint16_t initialPC = spc700.PC + 1;
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.PC, initialPC + offset);
+}
+
+TEST_F(Spc700Test, ReadFromAudioRAM) {
+  uint16_t address = 0x1234;
+  uint8_t expected_value = 0x5A;
+
+  EXPECT_CALL(audioRAM, read(address)).WillOnce(Return(expected_value));
+
+  uint8_t value = spc700.read(address);
+  EXPECT_EQ(value, expected_value);
+}
+
+TEST_F(Spc700Test, WriteToAudioRAM) {
+  uint16_t address = 0x1234;
+  uint8_t value = 0x5A;
+
+  EXPECT_CALL(audioRAM, write(address, value));
+
+  spc700.write(address, value);
+}
+
+TEST_F(Spc700Test, ExecuteANDWithImmediate) {
+  // AND A, imm
+  uint8_t opcode = 0x28;
+  uint8_t immediate_value = 0x0F;
+  spc700.A = 0x5A;  // 0101 1010
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(immediate_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x0A);  // 0101 1010 & 0000 1111 = 0000 1010
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, ExecuteORWithImmediate) {
+  // OR A, imm
+  uint8_t opcode = 0x08;
+  uint8_t immediate_value = 0x0F;
+  spc700.A = 0xA0;  // 1010 0000
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(immediate_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0xAF);  // 1010 0000 | 0000 1111 = 1010 1111
+  EXPECT_EQ(spc700.PSW.Z, 0);
+  // EXPECT_EQ(spc700.PSW.N, 1);
+}
+
+TEST_F(Spc700Test, ExecuteEORWithImmediate) {
+  // EOR A, imm
+  uint8_t opcode = 0x48;
+  uint8_t immediate_value = 0x5A;
+  spc700.A = 0x5A;  // 0101 1010
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(immediate_value));
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x00);  // 0101 1010 ^ 0101 1010 = 0000 0000
+  EXPECT_EQ(spc700.PSW.Z, 1);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, ExecuteINC) {
+  // INC A
+  uint8_t opcode = 0xBC;
+  spc700.A = 0xFF;
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x00);
+  EXPECT_EQ(spc700.PSW.Z, 1);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, ExecuteDEC) {
+  // DEC A
+  uint8_t opcode = 0x9C;
+  spc700.A = 0x01;
+
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.A, 0x00);
+  EXPECT_EQ(spc700.PSW.Z, 1);
+  EXPECT_EQ(spc700.PSW.N, 0);
+}
+
+TEST_F(Spc700Test, ExecuteBNEWhenNotEqual) {
+  // BNE
+  uint8_t opcode = 0xD0;
+  int8_t offset = 0x05;
+  spc700.PSW.Z = 0;
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(offset));
+
+  uint16_t initialPC = spc700.PC + 1;
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.PC, initialPC + offset);
+}
+
+TEST_F(Spc700Test, ExecuteBNEWhenEqual) {
+  // BNE
+  uint8_t opcode = 0xD0;
+  int8_t offset = 0x05;
+  spc700.PSW.Z = 1;
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(offset));
+
+  uint16_t initialPC = spc700.PC;
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.PC, initialPC + 1);  // +1 because of reading the offset
+}
+
+TEST_F(Spc700Test, ExecuteBEQWhenEqual) {
+  // BEQ
+  uint8_t opcode = 0xF0;
+  int8_t offset = 0x05;
+  spc700.PSW.Z = 1;
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(offset));
+
+  uint16_t initialPC = spc700.PC + 1;
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.PC, initialPC + offset);
+}
+
+TEST_F(Spc700Test, ExecuteBEQWhenNotEqual) {
+  // BEQ
+  uint8_t opcode = 0xF0;
+  int8_t offset = 0x05;
+  spc700.PSW.Z = 0;
+
+  EXPECT_CALL(audioRAM, read(_)).WillOnce(Return(offset));
+
+  uint16_t initialPC = spc700.PC;
+  spc700.ExecuteInstructions(opcode);
+
+  EXPECT_EQ(spc700.PC, initialPC + 1);  // +1 because of reading the offset
+}
+
+TEST_F(Spc700Test, BootIplRomOk) {
+  // Boot the IPL ROM
+  // spc700.BootIplRom();
+  // EXPECT_EQ(spc700.PC, 0xFFC1 + 0x3F);
+}
+
+}  // namespace test
+}  // namespace yaze