286 lines
7.7 KiB
C++
286 lines
7.7 KiB
C++
#ifndef YAZE_APP_EMU_SPC700_H
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#define YAZE_APP_EMU_SPC700_H
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#include <cstdint>
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#include <iostream>
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#include <unordered_map>
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#include <vector>
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namespace yaze {
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namespace app {
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namespace emu {
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namespace audio {
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/**
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* @brief AudioRam is an interface for the Audio RAM used by the SPC700.
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*/
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class AudioRam {
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public:
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virtual ~AudioRam() = default;
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virtual void reset() = 0;
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virtual uint8_t read(uint16_t address) const = 0;
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virtual uint8_t& mutable_read(uint16_t address) = 0;
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virtual void write(uint16_t address, uint8_t value) = 0;
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};
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/**
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* @brief AudioRamImpl is an implementation of the AudioRam interface.
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*/
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class AudioRamImpl : public AudioRam {
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static const int ARAM_SIZE = 0x10000;
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std::vector<uint8_t> ram = std::vector<uint8_t>(ARAM_SIZE, 0);
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public:
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AudioRamImpl() = default;
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void reset() override { ram = std::vector<uint8_t>(ARAM_SIZE, 0); }
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uint8_t read(uint16_t address) const override {
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return ram[address % ARAM_SIZE];
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}
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uint8_t& mutable_read(uint16_t address) override {
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return ram.at(address % ARAM_SIZE);
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}
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void write(uint16_t address, uint8_t value) override {
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ram[address % ARAM_SIZE] = value;
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}
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};
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/**
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* @class Spc700
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* @brief The Spc700 class represents the SPC700 processor.
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*
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* The Spc700 class provides the functionality to execute instructions, read and
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* write memory, and handle various addressing modes. It also contains registers
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* and flags specific to the SPC700.
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*
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* @note This class assumes the existence of an `AudioRam` object for memory
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* access.
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*/
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class Spc700 {
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private:
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AudioRam& aram_;
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std::vector<std::string> log_;
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const uint8_t ipl_rom_[64]{
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0xCD, 0xEF, 0xBD, 0xE8, 0x00, 0xC6, 0x1D, 0xD0, 0xFC, 0x8F, 0xAA,
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0xF4, 0x8F, 0xBB, 0xF5, 0x78, 0xCC, 0xF4, 0xD0, 0xFB, 0x2F, 0x19,
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0xEB, 0xF4, 0xD0, 0xFC, 0x7E, 0xF4, 0xD0, 0x0B, 0xE4, 0xF5, 0xCB,
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0xF4, 0xD7, 0x00, 0xFC, 0xD0, 0xF3, 0xAB, 0x01, 0x10, 0xEF, 0x7E,
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0xF4, 0x10, 0xEB, 0xBA, 0xF6, 0xDA, 0x00, 0xBA, 0xF4, 0xC4, 0xF4,
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0xDD, 0x5D, 0xD0, 0xDB, 0x1F, 0x00, 0x00, 0xC0, 0xFF};
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public:
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explicit Spc700(AudioRam& aram) : aram_(aram) {}
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// Registers
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uint8_t A = 0x00; // 8-bit accumulator
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uint8_t X = 0x00; // 8-bit index
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uint8_t Y = 0x00; // 8-bit index
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uint16_t YA = 0x00; // 16-bit pair of A (lsb) and Y (msb)
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uint16_t PC = 0xFFC0; // program counter
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uint8_t SP = 0x00; // stack pointer
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struct Flags {
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uint8_t N : 1; // Negative flag
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uint8_t V : 1; // Overflow flag
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uint8_t P : 1; // Direct page flag
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uint8_t B : 1; // Break flag
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uint8_t H : 1; // Half-carry flag
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uint8_t I : 1; // Interrupt enable
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uint8_t Z : 1; // Zero flag
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uint8_t C : 1; // Carry flag
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};
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Flags PSW; // Processor status word
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uint8_t FlagsToByte(Flags flags) {
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return (flags.N << 7) | (flags.V << 6) | (flags.P << 5) | (flags.B << 4) |
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(flags.H << 3) | (flags.I << 2) | (flags.Z << 1) | (flags.C);
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}
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Flags ByteToFlags(uint8_t byte) {
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Flags flags;
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flags.N = (byte & 0x80) >> 7;
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flags.V = (byte & 0x40) >> 6;
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flags.P = (byte & 0x20) >> 5;
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flags.B = (byte & 0x10) >> 4;
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flags.H = (byte & 0x08) >> 3;
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flags.I = (byte & 0x04) >> 2;
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flags.Z = (byte & 0x02) >> 1;
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flags.C = (byte & 0x01);
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return flags;
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}
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void Reset();
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void BootIplRom();
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void ExecuteInstructions(uint8_t opcode);
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void LogInstruction(uint16_t initial_pc, uint8_t opcode);
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// Read a byte from the memory-mapped registers
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uint8_t read(uint16_t address) {
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if (address < 0xFFC0) {
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return aram_.read(address);
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} else {
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// Check if register is set to unmap the IPL ROM
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if (read(0xF1) & 0x80) {
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return aram_.read(address);
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}
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return ipl_rom_[address - 0xFFC0];
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}
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}
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uint8_t& mutable_read(uint16_t address) {
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if (address < 0xFFC0) {
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return aram_.mutable_read(address);
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} else {
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// NOTE: Mutable access to IPL ROM is not allowed
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return aram_.mutable_read(address);
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}
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}
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uint16_t& mutable_read_16(uint16_t address) {
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if (address < 0xFFC0) {
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return *reinterpret_cast<uint16_t*>(&aram_.mutable_read(address));
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} else {
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// NOTE: Mutable access to IPL ROM is not allowed
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return *reinterpret_cast<uint16_t*>(&aram_.mutable_read(address));
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}
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}
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uint16_t read_16(uint16_t address) {
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if (address < 0xFFC0) {
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return (aram_.read(address) | (aram_.read(address + 1) << 8));
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} else {
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// Check if register is set to unmap the IPL ROM
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if (read(0xF1) & 0x80) {
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return aram_.read(address);
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}
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return ipl_rom_[address - 0xFFC0];
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}
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}
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// Write a byte to the memory-mapped registers
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void write(uint16_t address, uint8_t value) {
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if (address < 0xFFC0) {
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aram_.write(address, value);
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} else {
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// Check if register is set to unmap the IPL ROM
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if (read(0xF1) & 0x80) {
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aram_.write(address, value);
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}
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}
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}
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// ======================================================
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// Addressing modes
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// Immediate
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uint8_t imm();
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// Direct page
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uint8_t dp();
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uint8_t& mutable_dp();
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uint8_t get_dp_addr();
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// Direct page indexed by X
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uint8_t dp_plus_x();
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// Direct page indexed by Y
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uint8_t dp_plus_y();
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// Indexed indirect (add index before 16-bit lookup).
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uint16_t dp_plus_x_indirect();
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// Indirect indexed (add index after 16-bit lookup).
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uint16_t dp_indirect_plus_y();
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uint16_t abs();
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int8_t rel();
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uint8_t i();
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uint8_t i_postinc();
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uint16_t addr_plus_i();
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uint16_t addr_plus_i_indexed();
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// ==========================================================================
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// Instructions
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void MOV(uint8_t& dest, uint8_t operand);
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void MOV_ADDR(uint16_t address, uint8_t operand);
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void ADC(uint8_t& dest, uint8_t operand);
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void SBC(uint8_t& dest, uint8_t operand);
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void CMP(uint8_t& dest, uint8_t operand);
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void AND(uint8_t& dest, uint8_t operand);
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void OR(uint8_t& dest, uint8_t operand);
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void EOR(uint8_t& dest, uint8_t operand);
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void ASL(uint8_t operand);
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void LSR(uint8_t& operand);
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void ROL(uint8_t operand, bool isImmediate = false);
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void XCN(uint8_t operand, bool isImmediate = false);
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void INC(uint8_t& operand);
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void DEC(uint8_t& operand);
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void MOVW(uint16_t& dest, uint16_t operand);
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void INCW(uint16_t& operand);
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void DECW(uint16_t& operand);
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void ADDW(uint16_t& dest, uint16_t operand);
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void SUBW(uint16_t& dest, uint16_t operand);
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void CMPW(uint16_t operand);
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void MUL(uint8_t operand);
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void DIV(uint8_t operand);
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void BRA(int8_t offset);
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void BEQ(int8_t offset);
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void BNE(int8_t offset);
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void BCS(int8_t offset);
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void BCC(int8_t offset);
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void BVS(int8_t offset);
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void BVC(int8_t offset);
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void BMI(int8_t offset);
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void BPL(int8_t offset);
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void BBS(uint8_t bit, uint8_t operand);
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void BBC(uint8_t bit, uint8_t operand);
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void JMP(uint16_t address);
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void CALL(uint16_t address);
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void PCALL(uint8_t offset);
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void TCALL(uint8_t offset);
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void BRK();
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void RET();
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void RETI();
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void PUSH(uint8_t operand);
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void POP(uint8_t& operand);
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void SET1(uint8_t bit, uint8_t& operand);
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void CLR1(uint8_t bit, uint8_t& operand);
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void TSET1(uint8_t bit, uint8_t& operand);
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void TCLR1(uint8_t bit, uint8_t& operand);
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void AND1(uint8_t bit, uint8_t& operand);
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void OR1(uint8_t bit, uint8_t& operand);
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void EOR1(uint8_t bit, uint8_t& operand);
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void NOT1(uint8_t bit, uint8_t& operand);
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void MOV1(uint8_t bit, uint8_t& operand);
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void CLRC();
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void SETC();
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void NOTC();
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void CLRV();
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void CLRP();
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void SETP();
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void EI();
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void DI();
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void NOP();
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void SLEEP();
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void STOP();
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// CBNE DBNZ
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};
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} // namespace audio
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} // namespace emu
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} // namespace app
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} // namespace yaze
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#endif // YAZE_APP_EMU_SPC700_H
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