add int_delay to Cpu class
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@@ -31,6 +31,7 @@ void Cpu::Reset(bool hard) {
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waiting_ = false;
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nmi_wanted_ = false;
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int_wanted_ = false;
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int_delay_ = false;
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}
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void Cpu::Update(UpdateMode mode, int stepCount) {
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@@ -143,6 +143,14 @@ class Cpu : public Loggable, public core::ExperimentFlags {
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enum class AccessType { Control, Data };
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uint8_t ReadOpcode() { return ReadByte((PB << 16) | PC++); }
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uint16_t ReadOpcodeWord(bool int_check = false) {
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uint8_t value = ReadOpcode();
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if (int_check) CheckInt();
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return value | (ReadOpcode() << 8);
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}
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// Memory access routines
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uint8_t ReadByte(uint32_t address) const {
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return callbacks_.read_byte(address);
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@@ -254,14 +262,16 @@ class Cpu : public Loggable, public core::ExperimentFlags {
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void DoBranch(bool check) {
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if (!check) CheckInt();
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uint8_t value = FetchByte();
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uint8_t value = ReadOpcode();
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if (check) {
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CheckInt();
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callbacks_.idle(false); // taken branch: 1 extra cycle
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next_pc_ += (int8_t)value;
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PC += (int8_t)value;
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}
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}
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void set_int_delay(bool delay) { int_delay_ = delay; }
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// ==========================================================================
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// Addressing Modes
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@@ -736,7 +746,8 @@ class Cpu : public Loggable, public core::ExperimentFlags {
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auto GetBreakpoints() { return breakpoints_; }
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void CheckInt() {
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int_wanted_ = nmi_wanted_ || (irq_wanted_ && !GetInterruptFlag());
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int_wanted_ = (nmi_wanted_ || (irq_wanted_ && !GetInterruptFlag()))&& !int_delay_;
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int_delay_ = false;
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}
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auto mutable_log_instructions() -> bool* { return &log_instructions_; }
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@@ -778,10 +789,8 @@ class Cpu : public Loggable, public core::ExperimentFlags {
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bool nmi_wanted_ = false;
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bool reset_wanted_ = false;
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bool int_wanted_ = false;
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bool int_delay_ = false;
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uint16_t last_call_frame_;
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uint16_t next_pc_;
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uint8_t next_pb_;
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memory::CpuCallbacks callbacks_;
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memory::Memory& memory;
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