Update Cpu class logging
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@@ -410,7 +410,9 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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<< (int)DB << std::endl;
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<< (int)DB << std::endl;
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std::cout << "E: " << std::hex << std::setw(2) << std::setfill('0')
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std::cout << "E: " << std::hex << std::setw(2) << std::setfill('0')
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<< (int)E << std::endl;
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<< (int)E << std::endl;
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// status registers
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std::cout << "C: " << std::hex << std::setw(2) << std::setfill('0')
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<< (int)status << std::endl;
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break;
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break;
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}
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}
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@@ -559,7 +561,7 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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case 0xE0: // CPX Immediate
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case 0xE0: // CPX Immediate
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{
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{
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operand = Immediate();
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operand = Immediate(/*index_size=*/true);
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immediate = true;
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immediate = true;
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CPX(operand, immediate);
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CPX(operand, immediate);
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break;
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break;
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@@ -803,7 +805,7 @@ void CPU::ExecuteInstruction(uint8_t opcode) {
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case 0x20: // JSR Absolute
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case 0x20: // JSR Absolute
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{
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{
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operand = Absolute();
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operand = Absolute(AccessType::Control);
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JSR(operand);
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JSR(operand);
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break;
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break;
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}
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}
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@@ -1504,10 +1506,13 @@ void CPU::LogInstructions(uint16_t PC, uint8_t opcode, uint16_t operand,
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instruction_log_.push_back(entry);
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instruction_log_.push_back(entry);
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} else {
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} else {
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// Log the address and opcode.
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// Log the address and opcode.
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std::cout << "$" << std::uppercase << std::setw(2) << std::setfill('0')
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std::cout << "\033[1;36m"
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<< static_cast<int>(PB) << ":" << std::hex << PC << ": 0x"
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<< "$" << std::uppercase << std::setw(2) << std::setfill('0')
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<< std::hex << static_cast<int>(opcode) << " "
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<< static_cast<int>(PB) << ":" << std::hex << PC;
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<< opcode_to_mnemonic.at(opcode) << " ";
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std::cout << " \033[1;32m"
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<< ": 0x" << std::hex << static_cast<int>(opcode) << " ";
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std::cout << " \033[1;35m" << opcode_to_mnemonic.at(opcode) << " "
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<< "\033[0m";
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// Log the operand.
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// Log the operand.
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if (operand) {
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if (operand) {
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@@ -1543,11 +1548,15 @@ uint8_t CPU::GetInstructionLength(uint8_t opcode) {
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case 0xFC: // JSR Absolute Indexed Indirect
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case 0xFC: // JSR Absolute Indexed Indirect
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case 0xDC: // JMP Absolute Indirect Long
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case 0xDC: // JMP Absolute Indirect Long
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case 0x6B: // RTL
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case 0x6B: // RTL
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case 0x80: // BRA Relative
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case 0x82: // BRL Relative Long
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case 0x82: // BRL Relative Long
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PC = next_pc_;
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PC = next_pc_;
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return 0;
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return 0;
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case 0x80: // BRA Relative
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PC += next_pc_;
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return 2;
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case 0x60: // RTS
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case 0x60: // RTS
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PC = last_call_frame_;
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PC = last_call_frame_;
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return 0;
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return 0;
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@@ -1584,11 +1593,9 @@ uint8_t CPU::GetInstructionLength(uint8_t opcode) {
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case 0xD0: // BNE Relative
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case 0xD0: // BNE Relative
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if (!GetZeroFlag()) {
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if (!GetZeroFlag()) {
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PC = next_pc_;
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PC += next_pc_;
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return 0;
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} else {
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return 2;
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}
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}
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return 2;
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case 0x10: // BPL Relative
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case 0x10: // BPL Relative
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if (!GetNegativeFlag()) {
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if (!GetNegativeFlag()) {
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@@ -1776,16 +1783,18 @@ uint8_t CPU::GetInstructionLength(uint8_t opcode) {
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case 0x69: // ADC Immediate
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case 0x69: // ADC Immediate
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case 0x29: // AND Immediate
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case 0x29: // AND Immediate
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case 0xC9: // CMP Immediate
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case 0xC9: // CMP Immediate
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case 0xE0: // CPX Immediate
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case 0xC0: // CPY Immediate
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case 0x49: // EOR Immediate
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case 0x49: // EOR Immediate
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case 0xA9: // LDA Immediate
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case 0xA9: // LDA Immediate
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case 0xA2: // LDX Immediate
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case 0xA0: // LDY Immediate
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case 0x09: // ORA Immediate
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case 0x09: // ORA Immediate
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case 0xE9: // SBC Immediate
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case 0xE9: // SBC Immediate
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return GetAccumulatorSize() ? 2 : 3;
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return GetAccumulatorSize() ? 2 : 3;
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case 0xE0: // CPX Immediate
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case 0xC0: // CPY Immediate
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case 0xA2: // LDX Immediate
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case 0xA0: // LDY Immediate
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return GetIndexSize() ? 2 : 3;
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case 0x0E: // ASL Absolute
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case 0x0E: // ASL Absolute
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case 0x1E: // ASL Absolute Indexed, X
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case 0x1E: // ASL Absolute Indexed, X
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case 0x2D: // AND Absolute
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case 0x2D: // AND Absolute
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@@ -43,7 +43,7 @@ class CPU : public Memory, public Loggable, public core::ExperimentFlags {
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explicit CPU(Memory& mem, Clock& vclock) : memory(mem), clock(vclock) {}
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explicit CPU(Memory& mem, Clock& vclock) : memory(mem), clock(vclock) {}
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enum class UpdateMode { Run, Step, Pause };
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enum class UpdateMode { Run, Step, Pause };
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void Init() { clock.SetFrequency(kCpuClockSpeed); }
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void Init(bool verbose = false) { clock.SetFrequency(kCpuClockSpeed); }
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void Update(UpdateMode mode = UpdateMode::Run, int stepCount = 1);
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void Update(UpdateMode mode = UpdateMode::Run, int stepCount = 1);
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@@ -306,7 +306,7 @@ class CPU : public Memory, public Loggable, public core::ExperimentFlags {
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// Data Low: First Operand Byte
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// Data Low: First Operand Byte
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//
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//
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// LDA #const
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// LDA #const
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uint16_t Immediate();
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uint16_t Immediate(bool index_size = false);
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uint16_t StackRelative();
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uint16_t StackRelative();
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@@ -460,10 +460,10 @@ class CPU : public Memory, public Loggable, public core::ExperimentFlags {
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void COP();
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void COP();
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// CPX: Compare X register
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// CPX: Compare X register
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void CPX(uint16_t address, bool immediate = false);
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void CPX(uint32_t address, bool immediate = false);
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// CPY: Compare Y register
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// CPY: Compare Y register
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void CPY(uint16_t address, bool immediate = false);
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void CPY(uint32_t address, bool immediate = false);
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// DEC: Decrement memory
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// DEC: Decrement memory
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void DEC(uint32_t address, bool accumulator = false);
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void DEC(uint32_t address, bool accumulator = false);
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