Add CPU and Memory class for SNES emulator
This commit is contained in:
scawful
@@ -2,6 +2,7 @@ add_executable(
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yaze
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app/yaze.cc
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app/rom.cc
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app/emu/cpu.cc
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${YAZE_APP_CORE_SRC}
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${YAZE_APP_EDITOR_SRC}
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${YAZE_APP_GFX_SRC}
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1038
src/app/emu/cpu.cc
Normal file
1038
src/app/emu/cpu.cc
Normal file
File diff suppressed because it is too large
Load Diff
334
src/app/emu/cpu.h
Normal file
334
src/app/emu/cpu.h
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@@ -0,0 +1,334 @@
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#include <cstdint>
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#include <iostream>
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#include <vector>
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#include "mem.h"
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namespace yaze {
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namespace app {
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namespace emu {
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// ADC: Add with carry
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// AND: Logical AND
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// ASL: Arithmetic shift left
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// BCC: Branch if carry clear
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// BCS: Branch if carry set
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// BEQ: Branch if equal (zero set)
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// BIT: Bit test
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// BMI: Branch if minus (negative set)
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// BNE: Branch if not equal (zero clear)
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// BPL: Branch if plus (negative clear)
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// BRA: Branch always
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// BRK: Break
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// BRL: Branch always long
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// BVC: Branch if overflow clear
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// BVS: Branch if overflow set
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// CLC: Clear carry
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// CLD: Clear decimal
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// CLI: Clear interrupt disable
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// CLV: Clear overflow
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// CMP: Compare
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// COP: Coprocessor
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// CPX: Compare X register
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// CPY: Compare Y register
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// DEC: Decrement
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// DEX: Decrement X register
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// DEY: Decrement Y register
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// EOR: Exclusive OR
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// INC: Increment
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// INX: Increment X register
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// INY: Increment Y register
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// JMP: Jump
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// JML: Jump long
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// JSR: Jump to subroutine
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// JSL: Jump to subroutine long
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// LDA: Load accumulator
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// LDX: Load X register
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// LDY: Load Y register
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// LSR: Logical shift right
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// MVN: Move negative
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// MVP: Move positive
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// NOP: No operation
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// ORA: Logical OR
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// PEA: Push effective address
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// PEI: Push effective indirect address
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// PER: Push effective PC-relative address
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// PHA: Push accumulator
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// PHB: Push data bank register
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// PHD: Push direct page register
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// PHK: Push program bank register
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// PHP: Push processor status register
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// PHX: Push X register
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// PHY: Push Y register
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// PLA: Pull accumulator
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// PLB: Pull data bank register
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// PLD: Pull direct page register
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// PLP: Pull processor status register
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// PLX: Pull X register
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// PLY: Pull Y register
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// ROL: Rotate left
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// ROR: Rotate right
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// RTI: Return from interrupt
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// RTL: Return from subroutine long
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// RTS: Return from subroutine
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// SBC: Subtract with carry
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// STA: Store accumulator
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// STP: Stop the clock
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// STX: Store X register
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// STY: Store Y register
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// STZ: Store zero
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// TDC: Transfer direct page register to accumulator
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// TRB: Test and reset bits
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// TSB: Test and set bits
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// WAI: Wait for interrupt
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// XBA: Exchange B and A accumulator
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// XCE: Exchange carry and emulation
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class CPU : public Memory {
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private:
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Memory& memory;
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public:
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explicit CPU(Memory& mem) : memory(mem) {}
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uint8_t ReadByte(uint16_t address) const override;
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uint16_t ReadWord(uint16_t address) const override;
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uint32_t ReadWordLong(uint16_t address) const override;
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void SetMemory(const std::vector<uint8_t>& data) override {
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memory.SetMemory(data);
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}
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uint8_t FetchByte();
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uint16_t FetchWord();
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uint32_t FetchLong();
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int8_t FetchSignedByte();
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int16_t FetchSignedWord();
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uint8_t FetchByteDirectPage(uint8_t operand);
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uint16_t DirectPageIndexedIndirectX();
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uint16_t StackRelative();
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uint16_t DirectPage();
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uint16_t DirectPageIndirectLong();
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uint16_t Immediate();
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uint16_t Absolute();
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uint16_t AbsoluteLong();
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uint16_t DirectPageIndirectIndexedY();
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uint16_t DirectPageIndirect();
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uint16_t StackRelativeIndirectIndexedY();
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uint16_t DirectPageIndexedX();
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uint16_t DirectPageIndirectLongIndexedY();
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uint16_t AbsoluteIndexedY();
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uint16_t AbsoluteIndexedX();
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uint16_t AbsoluteLongIndexedX();
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void ExecuteInstruction(uint8_t opcode);
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void loadROM(const std::vector<uint8_t>& rom) {
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// if (rom.size() > memory.size()) {
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// std::cerr << "ROM too large" << std::endl;
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// return;
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// }
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// std::copy(rom.begin(), rom.end(), memory.begin());
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}
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// Registers
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uint8_t A = 0; // Accumulator
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uint8_t X = 0; // X index register
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uint8_t Y = 0; // Y index register
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uint8_t SP = 0; // Stack Pointer
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uint16_t DB = 0; // Data Bank register
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uint16_t D = 0; // Direct Page register
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uint16_t PB = 0; // Program Bank register
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uint16_t PC = 0; // Program Counter
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uint8_t status; // Processor Status (P)
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// Mnemonic Value Binary Description
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// N #$80 10000000 Negative
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// V #$40 01000000 Overflow
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// M #$20 00100000 Accumulator size (0 = 16-bit, 1 = 8-bit)
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// X #$10 00010000 Index size (0 = 16-bit, 1 = 8-bit)
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// D #$08 00001000 Decimal
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// I #$04 00000100 IRQ disable
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// Z #$02 00000010 Zero
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// C #$01 00000001 Carry
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// E 6502 emulation mode
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// B #$10 00010000 Break (emulation mode only)
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// Setting flags in the status register
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void SetZeroFlag(bool condition) {
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if (condition) {
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status |= 0x02;
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} else {
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status &= ~0x02;
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}
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}
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void SetNegativeFlag(bool condition) {
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if (condition) {
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status |= 0x80;
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} else {
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status &= ~0x80;
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}
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}
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void SetOverflowFlag(bool condition) {
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if (condition) {
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status |= 0x40;
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} else {
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status &= ~0x40;
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}
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}
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void SetCarryFlag(bool condition) {
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if (condition) {
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status |= 0x01;
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} else {
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status &= ~0x01;
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}
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}
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int GetCarryFlag() { return status & 0x01; }
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int GetZeroFlag() { return status & 0x02; }
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int GetAccumulatorSize() { return status & 0x20; }
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int GetIndexSize() { return status & 0x10; }
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int GetEmulationMode() { return status & 0x04; }
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// Instructions
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void ADC(uint8_t operand);
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void BEQ(int8_t offset) {
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if (GetZeroFlag()) { // If the zero flag is set
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PC += offset; // Add the offset to the program counter
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}
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}
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void BCC(int8_t offset) {
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if (!GetCarryFlag()) { // If the carry flag is clear
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PC += offset; // Add the offset to the program counter
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}
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}
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void BRL(int16_t offset) {
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PC += offset; // Add the offset to the program counter
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}
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void LDA() {
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A = memory[PC];
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x80);
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PC++;
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}
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void SEC() { status |= 0x01; }
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void CLC() { status &= ~0x01; }
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void CLD() { status &= ~0x08; }
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void CLI() { status &= ~0x04; }
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void CLV() { status &= ~0x40; }
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void SEI() { status |= 0x04; }
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void SED() { status |= 0x08; }
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void SEP() {
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PC++;
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auto byte = FetchByte();
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status |= byte;
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}
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void REP() {
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PC++;
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auto byte = FetchByte();
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status &= ~byte;
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}
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void TCD() {
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D = A;
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SetZeroFlag(D == 0);
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SetNegativeFlag(D & 0x80);
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}
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void TDC() {
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A = D;
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x80);
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}
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void TCS() { SP = A; }
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void TAX() {
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X = A;
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SetZeroFlag(X == 0);
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SetNegativeFlag(X & 0x80);
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}
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void TAY() {
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Y = A;
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SetZeroFlag(Y == 0);
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SetNegativeFlag(Y & 0x80);
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}
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void TYA() {
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A = Y;
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x80);
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}
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void TXA() {
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A = X;
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x80);
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}
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void TXY() {
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X = Y;
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SetZeroFlag(X == 0);
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SetNegativeFlag(X & 0x80);
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}
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void TYX() {
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Y = X;
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SetZeroFlag(Y == 0);
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SetNegativeFlag(Y & 0x80);
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}
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void TSX() {
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X = SP;
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SetZeroFlag(X == 0);
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SetNegativeFlag(X & 0x80);
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}
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void TXS() { SP = X; }
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void TSC() {
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A = SP;
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SetZeroFlag(A == 0);
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SetNegativeFlag(A & 0x80);
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}
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void INX() {
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X++;
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SetZeroFlag(X == 0);
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SetNegativeFlag(X & 0x80);
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}
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void INY() {
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Y++;
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SetZeroFlag(Y == 0);
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SetNegativeFlag(Y & 0x80);
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}
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// Appease the C++ Gods...
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uint8_t operator[](int i) const override { return 0; }
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uint8_t at(int i) const override { return 0; }
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};
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} // namespace emu
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} // namespace app
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} // namespace yaze
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45
src/app/emu/mem.h
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45
src/app/emu/mem.h
Normal file
@@ -0,0 +1,45 @@
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#ifndef MEM_H
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#define MEM_H
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// memory.h
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class Memory {
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public:
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virtual ~Memory() = default;
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virtual uint8_t ReadByte(uint16_t address) const = 0;
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virtual uint16_t ReadWord(uint16_t address) const = 0;
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virtual uint32_t ReadWordLong(uint16_t address) const = 0;
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virtual void SetMemory(const std::vector<uint8_t>& data) = 0;
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virtual uint8_t operator[](int i) const = 0;
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virtual uint8_t at(int i) const = 0;
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};
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class MemoryImpl : public Memory {
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public:
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uint8_t ReadByte(uint16_t address) const override {
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return memory_.at(address);
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}
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uint16_t ReadWord(uint16_t address) const override {
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return static_cast<uint16_t>(memory_.at(address)) |
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(static_cast<uint16_t>(memory_.at(address + 1)) << 8);
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}
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void SetMemory(const std::vector<uint8_t>& data) override { memory_ = data; }
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uint8_t at(int i) const override { return memory_[i]; }
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auto size() const { return memory_.size(); }
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auto begin() const { return memory_.begin(); }
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auto end() const { return memory_.end(); }
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uint8_t operator[](int i) const override {
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if (i > memory_.size()) {
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std::cout << i << " out of bounds \n";
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return memory_[0];
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}
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return memory_[i];
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}
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// Memory (64KB)
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std::vector<uint8_t> memory_;
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};
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#endif // MEM_H
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@@ -14,11 +14,13 @@ add_executable(
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yaze_test
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yaze_test.cc
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z3ed_test.cc
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cpu_test.cc
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../src/cli/patch.cc
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../src/cli/command_handler.cc
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compression_test.cc
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snes_palette_test.cc
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../src/app/rom.cc
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../src/app/emu/cpu.cc
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../src/app/gfx/bitmap.cc
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../src/app/gfx/snes_tile.cc
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../src/app/gfx/snes_palette.cc
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253
test/cpu_test.cc
Normal file
253
test/cpu_test.cc
Normal file
@@ -0,0 +1,253 @@
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#include "app/emu/cpu.h"
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#include <gmock/gmock.h>
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#include <gtest/gtest.h>
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#include "app/emu/mem.h"
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namespace yaze {
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namespace app {
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namespace emu {
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class MockMemory : public Memory {
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public:
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MOCK_CONST_METHOD1(ReadByte, uint8_t(uint16_t address));
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MOCK_CONST_METHOD1(ReadWord, uint16_t(uint16_t address));
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MOCK_CONST_METHOD1(ReadWordLong, uint32_t(uint16_t address));
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MOCK_CONST_METHOD1(at, uint8_t(int i));
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uint8_t operator[](int i) const override { return at(i); }
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MOCK_METHOD1(SetMemory, void(const std::vector<uint8_t>& data));
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void SetMemoryContents(const std::vector<uint8_t>& data) {
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memory_ = data;
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ON_CALL(*this, ReadByte(::testing::_))
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.WillByDefault(
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[this](uint16_t address) { return memory_.at(address); });
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ON_CALL(*this, ReadWord(::testing::_))
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.WillByDefault([this](uint16_t address) {
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return static_cast<uint16_t>(memory_.at(address)) |
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(static_cast<uint16_t>(memory_.at(address + 1)) << 8);
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});
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}
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private:
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std::vector<uint8_t> memory_;
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};
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using ::testing::_;
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using ::testing::Return;
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TEST(CPUTest, CheckMemoryContents) {
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MockMemory memory;
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std::vector<uint8_t> data = {0x00, 0x01, 0x02, 0x03, 0x04};
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memory.SetMemoryContents(data);
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EXPECT_EQ(memory.ReadByte(0), 0x00);
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EXPECT_EQ(memory.ReadByte(1), 0x01);
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EXPECT_EQ(memory.ReadByte(2), 0x02);
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EXPECT_EQ(memory.ReadByte(3), 0x03);
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EXPECT_EQ(memory.ReadByte(4), 0x04);
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}
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TEST(CPUTest, AddTwoPositiveNumbers) {
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MockMemory mock_memory;
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CPU cpu(mock_memory);
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cpu.A = 0x01;
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std::vector<uint8_t> data = {0x69, 0x01};
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mock_memory.SetMemoryContents(data);
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EXPECT_CALL(mock_memory, ReadByte(_)).WillOnce(Return(0x01));
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cpu.ExecuteInstruction(0x69); // ADC Immediate
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EXPECT_EQ(cpu.A, 0x02);
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}
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TEST(CPUTest, AddPositiveAndNegativeNumbers) {
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MockMemory mock_memory;
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CPU cpu(mock_memory);
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cpu.A = 10;
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std::vector<uint8_t> data = {0x69, static_cast<uint8_t>(-20)};
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mock_memory.SetMemoryContents(data);
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EXPECT_CALL(mock_memory, ReadByte(_)).WillOnce(Return(-20));
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cpu.ExecuteInstruction(0x69); // ADC Immediate
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EXPECT_EQ(cpu.A, static_cast<uint8_t>(-10));
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}
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TEST(CPUTest, CheckCarryFlag) {
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MockMemory mock_memory;
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CPU cpu(mock_memory);
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cpu.A = 0xFF;
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cpu.status = 0;
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std::vector<uint8_t> data = {0x15, 0x01}; // Operand at address 0x15
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mock_memory.SetMemoryContents(data);
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EXPECT_CALL(mock_memory, ReadByte(_)).WillOnce(Return(1));
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cpu.ExecuteInstruction(0x69); // ADC Immediate
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EXPECT_EQ(cpu.A, 0x00);
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EXPECT_TRUE(cpu.GetCarryFlag());
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}
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TEST(CPUTest, BCCWhenCarryFlagClear) {
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MockMemory mock_memory;
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CPU cpu(mock_memory);
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cpu.SetCarryFlag(false);
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cpu.PC = 0x1000;
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std::vector<uint8_t> data(0x1001, 2); // Operand at address 0x1001
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
EXPECT_CALL(mock_memory, ReadByte(_)).WillOnce(Return(2));
|
||||
|
||||
cpu.ExecuteInstruction(0x90); // BCC
|
||||
EXPECT_EQ(cpu.PC, 0x1002);
|
||||
}
|
||||
|
||||
TEST(CPUTest, BCCWhenCarryFlagSet) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.SetCarryFlag(true);
|
||||
cpu.PC = 0x1000;
|
||||
std::vector<uint8_t> data(0x1001, 2); // Operand at address 0x1001
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
EXPECT_CALL(mock_memory, ReadByte(_)).WillOnce(Return(2));
|
||||
|
||||
cpu.ExecuteInstruction(0x90); // BCC
|
||||
cpu.BCC(2);
|
||||
EXPECT_EQ(cpu.PC, 0x1000);
|
||||
}
|
||||
|
||||
TEST(CPUTest, BranchLongAlways) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.PC = 0x1000;
|
||||
std::vector<uint8_t> data(0x1001, 2); // Operand at address 0x1001
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
EXPECT_CALL(mock_memory, ReadWord(_)).WillOnce(Return(2));
|
||||
|
||||
cpu.ExecuteInstruction(0x82); // BRL
|
||||
EXPECT_EQ(cpu.PC, 0x1004);
|
||||
}
|
||||
|
||||
TEST(CPUTest, REP) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.status = 0xFF; // All flags set
|
||||
std::vector<uint8_t> data = {0xC2, 0x30, 0x00}; // REP #0x30 (clear N & Z flags)
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0xC2); // REP
|
||||
EXPECT_EQ(cpu.status, 0xCF); // 11001111
|
||||
}
|
||||
|
||||
TEST(CPUTest, SEP) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.status = 0x00; // All flags cleared
|
||||
std::vector<uint8_t> data = {0xE2, 0x30, 0x00}; // SEP #0x30 (set N & Z flags)
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0xE2); // SEP
|
||||
EXPECT_EQ(cpu.status, 0x30); // 00110000
|
||||
}
|
||||
|
||||
TEST(CPUTest, TXA) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.X = 0xAB; // X register
|
||||
std::vector<uint8_t> data = {0x8A}; // TXA
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0x8A); // TXA
|
||||
EXPECT_EQ(cpu.A, 0xAB); // A register should now be equal to X
|
||||
}
|
||||
|
||||
TEST(CPUTest, TAX) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.A = 0xBC; // A register
|
||||
std::vector<uint8_t> data = {0xAA}; // TAX
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0xAA); // TAX
|
||||
EXPECT_EQ(cpu.X, 0xBC); // X register should now be equal to A
|
||||
}
|
||||
|
||||
TEST(CPUTest, TYA) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.Y = 0xCD; // Y register
|
||||
std::vector<uint8_t> data = {0x98}; // TYA
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0x98); // TYA
|
||||
EXPECT_EQ(cpu.A, 0xCD); // A register should now be equal to Y
|
||||
}
|
||||
|
||||
TEST(CPUTest, TAY) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.A = 0xDE; // A register
|
||||
std::vector<uint8_t> data = {0xA8}; // TAY
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0xA8); // TAY
|
||||
EXPECT_EQ(cpu.Y, 0xDE); // Y register should now be equal to A
|
||||
}
|
||||
|
||||
TEST(CPUTest, ADCDirectPage) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.A = 0x01;
|
||||
cpu.D = 0x0000;
|
||||
std::vector<uint8_t> data = {0x65, 0x01, 0x05};
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
EXPECT_CALL(mock_memory, ReadByte(_)).WillOnce(Return(0x01));
|
||||
|
||||
cpu.ExecuteInstruction(0x65); // ADC Direct Page
|
||||
EXPECT_EQ(cpu.A, 0x06);
|
||||
}
|
||||
|
||||
TEST(CPUTest, ADCAbsolute) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.A = 0x01;
|
||||
std::vector<uint8_t> data = {0x6D, 0x10, 0x00, 0x05};
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0x6D); // ADC Absolute
|
||||
EXPECT_EQ(cpu.A, 0x06);
|
||||
}
|
||||
|
||||
TEST(CPUTest, ADCIndirectX) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.A = 0x01;
|
||||
cpu.X = 0x02;
|
||||
std::vector<uint8_t> data = {0x72, 0x10, 0x00, 0x00, 0x20, 0x05};
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0x72); // ADC Indirect Indexed with X
|
||||
EXPECT_EQ(cpu.A, 0x06);
|
||||
}
|
||||
|
||||
TEST(CPUTest, ADCIndexedIndirect) {
|
||||
MockMemory mock_memory;
|
||||
CPU cpu(mock_memory);
|
||||
cpu.A = 0x01;
|
||||
cpu.X = 0x02;
|
||||
std::vector<uint8_t> data = {0x61, 0x10, 0x18, 0x20, 0x05};
|
||||
mock_memory.SetMemoryContents(data);
|
||||
|
||||
cpu.ExecuteInstruction(0x61); // ADC Indexed Indirect
|
||||
EXPECT_EQ(cpu.A, 0x06);
|
||||
}
|
||||
|
||||
} // namespace emu
|
||||
} // namespace app
|
||||
} // namespace yaze
|
||||
Reference in New Issue
Block a user